Dmitry Stogov ffac404552 Fix impossible load fusion

2023-06-20 12:14:52 +03:00

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args_001.irt

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args_002.irt

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call2.irt

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call3.irt

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call_002.irt

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call_003.irt

Improve parallel copy algorithm to support move of single source into multiple destinations

2023-04-26 10:56:55 +03:00

call_alloca.irt

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call_vaddr.irt

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call-O0.irt

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call.irt

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combo_001.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

combo_002.irt

Added type compatibility assertion and fixed mistakes in tests

2023-05-22 20:48:07 +03:00

combo_003.irt

Added type compatibility assertion and fixed mistakes in tests

2023-05-22 20:48:07 +03:00

combo_004.irt

Fixed mistakes in GCM algorithm

2023-05-29 17:02:50 +03:00

dce_001.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

dessa_001.irt

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dessa_002.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

dessa_003.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

fig-O0.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

fig.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

ijmp_001.irt

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lea_001.irt

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loop_001.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

loop_002.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

memop_001.irt

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memop_002.irt

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memop_003.irt

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memop_004.irt

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memop_005.irt

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memop_006.irt

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memop_007.irt

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memop_008.irt

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memop_009.irt

Fix impossible load fusion

2023-06-20 12:14:52 +03:00

memop_010.irt

Fix impossible load fusion

2023-06-20 12:14:52 +03:00

params_001.irt

Avoid loading of stack parameter to register if this is not necessary

2023-06-09 00:35:15 +03:00

params_002.irt

Better usage of the register hints

2023-06-09 16:26:15 +03:00

params_003.irt

Avoid reservaton of temporary resiser for argument passing

2023-04-26 12:16:05 +03:00

ra_001.irt

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ra_002.irt

Split assign_regs() loop into two versions (with and without spilling).

2023-06-20 08:34:54 +03:00

ra_003.irt

Split assign_regs() loop into two versions (with and without spilling).

2023-06-20 08:34:54 +03:00

regset-fib2.irt

Fixed SSA deconstruction

2023-05-17 22:37:45 +03:00

regset-fib.irt

Fixed SSA deconstruction

2023-05-17 22:37:45 +03:00

regset-fibi.irt

Fixed SSA deconstruction

2023-05-17 22:37:45 +03:00

regset-test.irt

Fixed SSA deconstruction

2023-05-17 22:37:45 +03:00

sccp_001.irt

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sccp_002.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

swap_001.irt

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swap_002.irt

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switch_001.irt

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switch_002.irt

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switch_003.irt

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tailcall_001.irt

Remove data dependency between TAILCALL and UNREACHABLE

2023-04-13 02:41:28 +03:00

tailcall_002.irt

Remove data dependency between TAILCALL and UNREACHABLE

2023-04-13 02:41:28 +03:00

test64.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

test_mem.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

test_var-O0.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

test_var.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

test-mavx.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

test-O0.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00

test.irt

Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.

2023-03-23 00:47:27 +03:00