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c9fa8dfebd
Previously we performed parallel copy for virtual registers, now we do the same for the target CPU registers.
206 lines
5.2 KiB
Plaintext
206 lines
5.2 KiB
Plaintext
--TEST--
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Test
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--TARGET--
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aarch64
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--ARGS--
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--debug-regset 0x3ffffffff --save --dump-live-ranges -S
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--CODE--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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double c_4 = 0.5;
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double c_5 = 0;
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int32_t c_6 = 0;
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int32_t c_7 = 1;
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double c_8 = 16;
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int32_t c_9 = 1000;
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l_1 = START(l_35);
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double d_2 = PARAM(l_1, "x", 0);
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double d_3 = PARAM(l_1, "y", 1);
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double d_4 = VAR(l_1, "cr");
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double d_5 = SUB(d_3, c_4);
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double d_6 = VAR(l_1, "ci");
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double d_7 = VAR(l_1, "zi");
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double d_8 = VAR(l_1, "zr");
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int32_t d_9 = VAR(l_1, "i");
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l_10 = END(l_1);
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l_11 = LOOP_BEGIN(l_10, l_37);
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double d_12 = PHI(l_11, c_5, d_25);
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double d_13 = PHI(l_11, c_5, d_23);
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int32_t d_14 = PHI(l_11, c_6, d_15);
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int32_t d_15 = ADD(d_14, c_7);
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double d_16 = VAR(l_11, "temp");
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double d_17 = MUL(d_13, d_12);
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double d_18 = VAR(l_11, "zr2");
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double d_19 = MUL(d_13, d_13);
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double d_20 = VAR(l_11, "zi2");
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double d_21 = MUL(d_12, d_12);
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double d_22 = SUB(d_19, d_21);
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double d_23 = ADD(d_22, d_5);
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double d_24 = ADD(d_17, d_17);
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double d_25 = ADD(d_24, d_2);
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double d_26 = ADD(d_21, d_19);
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bool d_27 = GT(d_26, c_8);
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l_28 = IF(l_11, d_27);
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l_29 = IF_TRUE(l_28);
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l_30 = RETURN(l_29, d_15);
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l_31 = IF_FALSE(l_28);
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bool d_32 = GT(d_15, c_9);
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l_33 = IF(l_31, d_32);
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l_34 = IF_TRUE(l_33);
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l_35 = RETURN(l_34, c_6, l_30);
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l_36 = IF_FALSE(l_33);
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l_37 = LOOP_END(l_36);
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}
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--EXPECT--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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double c_4 = 0.5;
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double c_5 = 0;
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int32_t c_6 = 0;
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int32_t c_7 = 1;
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double c_8 = 16;
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int32_t c_9 = 1000;
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l_1 = START(l_30);
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double d_2 = PARAM(l_1, "x", 0);
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double d_3 = PARAM(l_1, "y", 1);
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double d_4 = VAR(l_1, "cr");
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double d_5 = SUB(d_3, c_4);
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double d_6 = VAR(l_1, "ci");
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double d_7 = VAR(l_1, "zi");
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double d_8 = VAR(l_1, "zr");
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int32_t d_9 = VAR(l_1, "i");
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l_10 = END(l_1);
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l_11 = LOOP_BEGIN(l_10, l_37);
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double d_12 = PHI(l_11, c_5, d_36);
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double d_13 = PHI(l_11, c_5, d_34);
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int32_t d_14 = PHI(l_11, c_6, d_15);
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int32_t d_15 = ADD(d_14, c_7);
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double d_16 = VAR(l_11, "temp");
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double d_17 = VAR(l_11, "zr2");
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double d_18 = MUL(d_13, d_13);
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double d_19 = VAR(l_11, "zi2");
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double d_20 = MUL(d_12, d_12);
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double d_21 = ADD(d_20, d_18);
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bool d_22 = GT(d_21, c_8);
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l_23 = IF(l_11, d_22);
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l_24 = IF_TRUE(l_23);
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l_25 = RETURN(l_24, d_15);
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l_26 = IF_FALSE(l_23);
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bool d_27 = GT(d_15, c_9);
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l_28 = IF(l_26, d_27);
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l_29 = IF_TRUE(l_28);
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l_30 = RETURN(l_29, c_6, l_25);
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l_31 = IF_FALSE(l_28);
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double d_32 = MUL(d_13, d_12);
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double d_33 = SUB(d_18, d_20);
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double d_34 = ADD(d_33, d_5);
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double d_35 = ADD(d_32, d_32);
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double d_36 = ADD(d_35, d_2);
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l_37 = LOOP_END(l_31);
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}
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{ # LIVE-RANGES (vregs_count=12)
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TMP
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[%d0]: [5.0-5.2)/2
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[%d1]: [10.2-10.3)/1
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[%w0]: [10.2-10.3)/0
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[%d1]: [23.0-23.2)/22.2
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R1 (d_2) [SPILL=0x0]
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[%d0]: [2.3-5.0), DEF(2.3, hint=%d0)
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: [5.0-24.0), [26.0-29.0), [31.0-36.0)
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[%d1]: [36.0-38.0), USE(36.1/2)!
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R2 (d_3) [%d1]: [3.3-5.1), DEF(3.3, hint=%d1), USE(5.1/1)!
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R3 (d_5) [SPILL=0x8]
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[%d0]: [5.2-10.2), DEF(5.2)!
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: [10.2-24.0), [26.0-29.0), [31.0-34.0)
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[%d1]: [34.0-34.1), USE(34.1/2)!
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: [34.1-38.0)
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R4 (d_12, d_36) [SPILL=0x10]
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[%d0]: [11.0-20.2), DEF(12.2), USE(20.1/1)!, USE(20.1/2)!
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: [20.2-24.0), [26.0-29.0), [31.0-32.0)
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[%d0]: [32.0-32.1), [36.2-38.0), USE(32.1/2)!, DEF(36.2)!, PHI_USE(37.2, phi=d_12/3)
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R5 (d_13, d_34) [SPILL=0x18]
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[%d1]: [11.0-18.2), DEF(13.2), USE(18.1/1)!, USE(18.1/2)!
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: [18.2-24.0), [26.0-29.0), [31.0-32.0)
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[%d1]: [32.0-32.1), [34.2-36.0), USE(32.1/1)!, DEF(34.2)!
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: [36.0-37.1)
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: [37.1-38.0), PHI_USE(37.2, phi=d_13/3)
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R6 (d_14, d_15) [%w0]: [11.0-15.1), [15.2-25.0), [26.0-29.0), [31.0-38.0), DEF(14.2), USE(15.1/1)!, DEF(15.2)!, USE(25.0/2, hint=%w0), USE(28.1/27.1)!, PHI_USE(37.2, phi=d_14/3)
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R7 (d_18) [SPILL=0x20]
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[%d1]: [18.2-23.0), DEF(18.2)!, USE(21.1/2)!
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: [23.0-24.0), [26.0-29.0), [31.0-33.0)
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[%d0]: [33.0-33.1), USE(33.1/1)!
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R8 (d_20) [SPILL=0x28]
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[%d0]: [20.2-21.2), DEF(20.2)!, USE(21.1/1)!
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: [21.2-24.0), [26.0-29.0), [31.0-33.0)
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[%d1]: [33.0-33.1), USE(33.1/2)!
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R9 (d_21) [%d0]: [21.2-23.1), DEF(21.2)!, USE(23.1/22.1)!
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R10 (d_32) [SPILL=0x30]
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[%d0]: [32.2-33.0), DEF(32.2)!
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: [33.0-35.0)
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[%d0]: [35.0-35.1), USE(35.1/1)!, USE(35.1/2)!
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R11 (d_33) [%d0]: [33.2-34.1), DEF(33.2)!, USE(34.1/1)!
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R12 (d_35) [%d0]: [35.2-36.1), DEF(35.2)!, USE(36.1/1)!
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[%x0] : [25.0-25.1), [30.0-30.1)
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[%d0] : [1.0-2.3)
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[%d1] : [1.0-3.3)
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}
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test:
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sub sp, sp, #0x38
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str d0, [sp]
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ldr d0, .L4
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fsub d0, d1, d0
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str d0, [sp, #8]
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fmov d0, xzr
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str d0, [sp, #0x10]
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fmov d1, xzr
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str d1, [sp, #0x18]
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mov w0, wzr
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.L1:
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add w0, w0, #1
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ldr d1, [sp, #0x18]
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fmul d1, d1, d1
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str d1, [sp, #0x20]
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ldr d0, [sp, #0x10]
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fmul d0, d0, d0
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str d0, [sp, #0x28]
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ldr d0, [sp, #0x28]
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ldr d1, [sp, #0x20]
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fadd d0, d0, d1
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ldr d1, .L5
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fcmp d0, d1
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b.gt .L2
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cmp w0, #0x3e8
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b.gt .L3
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ldr d1, [sp, #0x18]
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ldr d0, [sp, #0x10]
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fmul d0, d1, d0
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str d0, [sp, #0x30]
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ldr d0, [sp, #0x20]
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ldr d1, [sp, #0x28]
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fsub d0, d0, d1
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ldr d1, [sp, #8]
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fadd d1, d0, d1
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str d1, [sp, #0x18]
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ldr d0, [sp, #0x30]
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fadd d0, d0, d0
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ldr d1, [sp]
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fadd d0, d0, d1
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str d0, [sp, #0x10]
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b .L1
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.L2:
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add sp, sp, #0x38
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ret
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.L3:
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mov w0, wzr
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add sp, sp, #0x38
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ret
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.rodata
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.L4:
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.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x3f
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.L5:
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.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x40
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