ir/tests/debug.aarch64/switch_003.irt
2022-11-08 11:56:22 +03:00

65 lines
1.1 KiB
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--TEST--
SWITCH 003
--TARGET--
aarch64
--ARGS--
-S
--CODE--
{
uintptr_t c_1 = 0;
bool c_2 = 0;
bool c_3 = 1;
int64_t c_4 = 8589934592;
int64_t c_5 = 8589934593;
int64_t c_6 = 8589935594;
int64_t c_7 = 8589934595;
l_1 = START(l_16);
int64_t d_2 = PARAM(l_1, "z", 0);
l_4 = SWITCH(l_1, d_2);
l_5 = CASE_VAL(l_4, c_4);
int64_t x_1 = COPY(c_4);
l_6 = END(l_5);
l_7 = CASE_VAL(l_4, c_5);
int64_t x_2 = COPY(c_5);
l_8 = END(l_7);
l_9 = CASE_VAL(l_4, c_6);
int64_t x_3 = COPY(c_6);
l_10 = END(l_9);
l_11 = CASE_DEFAULT(l_4);
int64_t x_4 = COPY(c_7);
l_12 = END(l_11);
l_13 = MERGE/4(l_6, l_8, l_10, l_12);
int64_t ret = PHI/4(l_13, x_1, x_2, x_3, x_4);
l_16 = RETURN(l_13, ret);
}
--EXPECT--
test:
movz x1, #0x2, lsl #32
cmp x0, x1
b.eq .L1
movz x1, #0x1
movk x1, #0x2, lsl #32
cmp x0, x1
b.eq .L3
movz x1, #0x3ea
movk x1, #0x2, lsl #32
cmp x0, x1
b.eq .L4
b .L5
.L1:
movz x0, #0x2, lsl #32
.L2:
ret
.L3:
movz x0, #0x1
movk x0, #0x2, lsl #32
b .L2
.L4:
movz x0, #0x3ea
movk x0, #0x2, lsl #32
b .L2
.L5:
movz x0, #0x3
movk x0, #0x2, lsl #32
b .L2