mirror of
https://github.com/danog/ir.git
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98 lines
2.6 KiB
Plaintext
98 lines
2.6 KiB
Plaintext
- type casting nodes
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- overflow detection nodes
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- va_arg nodes
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- BSTART, BEND nodes (to free data allocated by ALLOCA)
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- ENTRY node for multy-entry units
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- IJMP
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- guards
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- variable name binding
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- VLOAD, VSTORE -> SSA
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? reassociation folding rules
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- folding engine improvement (one rule for few patterns)
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- irreducable loops detection
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- irreducable loops support
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- range inference and PI node
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- SCCP edge cases
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- Folding after SCCP (see combo4.ir)
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- local scheduling according to data dependencies, register presure and pipeline stalls
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- basic block trace scheduling
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? C code generation
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- VLOAD, VSTORE
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? instruction selection
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- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr, maxss, maxsd, minss, minsd
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- MOVZX to avoid a SHIFT and AND instruction
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- Using CMOVcc to remove branches
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- mov rax, 123456789abcdef0h ; 10 bytes (64-bit constant)
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- mov rax, -100 ; 7 bytes (32-bit sign-extended)
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- mov eax, 100 ; 5 bytes (32-bit zero-extended)
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? register allocation
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+ linear scan
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- allocate scratch registers first
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- separate INT and FP allocation phases
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+ use positions
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? fixed registers constraints
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+ fixed input
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+ fixed output
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+ fixed tmp
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+ fixed intervals for parameters
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- accurate fixed interval construction
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- constraints
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- kill
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- restricted regset
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- temporary registers
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? spills
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+ spill slot allocation ( uniqe for each VREG)
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- uniqe for each VREG
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- SpillRange ???
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- splitting
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- SplitAt
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- splinting
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- spill only at cold path if possible
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? hints
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+ hints for fixed input/outpu registers
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+ hints for parameter nodes
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- hints for call arguments
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- hints propagation
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- hints and low priority
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? code generation
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- POW, NEG (fp), ABS, OVERFLOW, MIN, MAX, COND
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- TAILCALL
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- ALLOCA, VLOAD, VSTORE, LOAD, STORE
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+ SWITCH
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- ir_last_use
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- 64-bit constant (ir_emit_ref, ir_emit_dssa_move)
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- binop_int $imm, mem
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- commutative insns and swap (binop_int, mul, binop_sse, binop_avx, cmp_int, cmp_fp, cmp_br_int)
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- dessa_move (push, pop)
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- param_move
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- temporary register (e.g. for unsupported immediate operand in mul, div)
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+ temporary register for swap (dessa3.ir)
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- temporary register for spill loads and stores
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- parallel parameter loading
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+ parallel argument passing
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- return merge/split
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? binary code emission
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+ DynAsm
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- BinAsm
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- 32-bit x86 code
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? disassembler
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- .rodata section and relative data labels
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- modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data)
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- C compiler
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- interpreter
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- alias analyzes
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- PHP support
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