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https://github.com/danog/ir.git
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6edb011548
- Fixed COND on AArch64 - Fixed SYM support on AArch64
132 lines
2.6 KiB
Plaintext
132 lines
2.6 KiB
Plaintext
--TEST--
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Mandelbrot Test (-O0)
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--TARGET--
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aarch64
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--ARGS--
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-S -O0
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--CODE--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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double c_4 = 0.5;
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double c_5 = 0;
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int32_t c_6 = 0;
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int32_t c_7 = 1;
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double c_8 = 16;
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int32_t c_9 = 1000;
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l_1 = START(l_35);
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double d_2 = PARAM(l_1, "x", 0);
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double d_3 = PARAM(l_1, "y", 1);
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double d_4 = VAR(l_1, "cr");
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double d_5 = SUB(d_3, c_4);
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double d_6 = VAR(l_1, "ci");
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double d_7 = VAR(l_1, "zi");
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double d_8 = VAR(l_1, "zr");
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int32_t d_9 = VAR(l_1, "i");
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l_10 = END(l_1);
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l_11 = LOOP_BEGIN(l_10, l_37);
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double d_12 = PHI(l_11, c_5, d_25);
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double d_13 = PHI(l_11, c_5, d_23);
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int32_t d_14 = PHI(l_11, c_6, d_15);
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int32_t d_15 = ADD(d_14, c_7);
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double d_16 = VAR(l_11, "temp");
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double d_17 = MUL(d_13, d_12);
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double d_18 = VAR(l_11, "zr2");
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double d_19 = MUL(d_13, d_13);
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double d_20 = VAR(l_11, "zi2");
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double d_21 = MUL(d_12, d_12);
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double d_22 = SUB(d_19, d_21);
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double d_23 = ADD(d_22, d_5);
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double d_24 = ADD(d_17, d_17);
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double d_25 = ADD(d_24, d_2);
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double d_26 = ADD(d_21, d_19);
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bool d_27 = GT(d_26, c_8);
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l_28 = IF(l_11, d_27);
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l_29 = IF_TRUE(l_28);
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l_30 = RETURN(l_29, d_15);
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l_31 = IF_FALSE(l_28);
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bool d_32 = GT(d_15, c_9);
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l_33 = IF(l_31, d_32);
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l_34 = IF_TRUE(l_33);
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l_35 = RETURN(l_34, c_6, l_30);
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l_36 = IF_FALSE(l_33);
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l_37 = LOOP_END(l_36);
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}
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--EXPECT--
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test:
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sub sp, sp, #0x70
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str d0, [sp]
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str d1, [sp, #8]
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ldr d2, [sp, #8]
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ldr d1, .L4
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fsub d0, d2, d1
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str d0, [sp, #0x10]
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fmov d0, xzr
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str d0, [sp, #0x18]
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fmov d0, xzr
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str d0, [sp, #0x20]
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mov w0, wzr
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str w0, [sp, #0x28]
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.L1:
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ldr w1, [sp, #0x28]
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add w0, w1, #1
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str w0, [sp, #0x2c]
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ldr d1, [sp, #0x20]
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ldr d2, [sp, #0x18]
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fmul d0, d1, d2
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str d0, [sp, #0x30]
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ldr d1, [sp, #0x20]
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fmul d0, d1, d1
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str d0, [sp, #0x38]
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ldr d1, [sp, #0x18]
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fmul d0, d1, d1
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str d0, [sp, #0x40]
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ldr d1, [sp, #0x38]
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ldr d2, [sp, #0x40]
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fsub d0, d1, d2
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str d0, [sp, #0x48]
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ldr d1, [sp, #0x48]
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ldr d2, [sp, #0x10]
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fadd d0, d1, d2
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str d0, [sp, #0x50]
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ldr d1, [sp, #0x30]
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fadd d0, d1, d1
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str d0, [sp, #0x58]
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ldr d1, [sp, #0x58]
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ldr d2, [sp]
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fadd d0, d1, d2
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str d0, [sp, #0x60]
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ldr d1, [sp, #0x40]
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ldr d2, [sp, #0x38]
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fadd d0, d1, d2
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str d0, [sp, #0x68]
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ldr d1, [sp, #0x68]
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ldr d0, .L5
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fcmp d1, d0
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b.le .L2
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ldr w0, [sp, #0x2c]
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add sp, sp, #0x70
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ret
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.L2:
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ldr w0, [sp, #0x2c]
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cmp w0, #0x3e8
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b.le .L3
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mov w0, wzr
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add sp, sp, #0x70
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ret
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.L3:
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ldr d0, [sp, #0x60]
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str d0, [sp, #0x18]
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ldr d0, [sp, #0x50]
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str d0, [sp, #0x20]
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ldr w0, [sp, #0x2c]
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str w0, [sp, #0x28]
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b .L1
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.rodata
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.db 0x1f, 0x20, 0x03, 0xd5
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.L4:
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.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x3f
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.L5:
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.db 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x40
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