mirror of
https://github.com/danog/ir.git
synced 2024-11-30 04:39:43 +01:00
181 lines
4.1 KiB
Plaintext
181 lines
4.1 KiB
Plaintext
--TEST--
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Fig -O0
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--TARGET--
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x86_64
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--ARGS--
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-S -O0
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--CODE--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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int32_t i_1 = 1;
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int32_t i_4 = 4;
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ll_1 = START(ll_16); # <-
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int32_t a_0 = PARAM(ll_1, "a", 0);
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int32_t b_0 = PARAM(ll_1, "b", 1);
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int32_t c_0 = PARAM(ll_1, "c", 2);
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int32_t d_0 = PARAM(ll_1, "d", 3);
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int32_t l_0 = PARAM(ll_1, "l", 4);
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int32_t m_0 = PARAM(ll_1, "m", 5);
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int32_t s_0 = PARAM(ll_1, "s", 6);
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int32_t t_0 = PARAM(ll_1, "t", 7);
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int32_t cond1 = PARAM(ll_1, "cond1", 8);
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int32_t cond2 = PARAM(ll_1, "cond2", 9);
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ll_2 = END(ll_1);
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ll_3 = LOOP_BEGIN(ll_2, ll_12); # <-
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int32_t a_1 = PHI(ll_3, a_0, a_3);
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int32_t d_1 = PHI(ll_3, d_0, d_3);
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int32_t m_1 = PHI(ll_3, m_0, m_3);
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int32_t s_1 = PHI(ll_3, s_0, s_3);
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int32_t t_1 = PHI(ll_3, t_0, t_3);
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ll_4 = IF(ll_3, cond1);
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ll_5 = IF_TRUE(ll_4);
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int32_t l_1 = MUL(c_0, b_0);
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int32_t m_2 = ADD(l_1, i_4);
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int32_t a_2 = COPY(c_0);
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ll_6 = END(ll_5);
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ll_7 = IF_FALSE(ll_4);
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int32_t d_2 = COPY(c_0);
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int32_t l_2 = MUL(d_2, b_0);
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int32_t s_2 = MUL(a_1, b_0);
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int32_t t_2 = ADD(s_2, i_1);
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ll_8 = END(ll_7);
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ll_9 = MERGE(ll_6, ll_8);
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int32_t a_3 = PHI(ll_9, a_2, a_1);
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int32_t d_3 = PHI(ll_9, d_1, d_2);
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int32_t l_3 = PHI(ll_9, l_1, l_2);
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int32_t m_3 = PHI(ll_9, m_2, m_1);
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int32_t s_3 = PHI(ll_9, s_1, s_2);
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int32_t t_3 = PHI(ll_9, t_1, t_2);
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int32_t x_0 = MUL(a_3, b_0);
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int32_t y_0 = ADD(x_0, i_1);
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ll_10 = IF(ll_9, cond2);
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ll_11 = IF_TRUE(ll_10);
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ll_12 = LOOP_END(ll_11);
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ll_13 = IF_FALSE(ll_10);
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int32_t ret1 = ADD(a_3, b_0);
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int32_t ret2 = ADD(ret1, c_0);
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int32_t ret3 = ADD(ret2, d_3);
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int32_t ret4 = ADD(ret3, l_3);
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int32_t ret5 = ADD(ret4, m_3);
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int32_t ret6 = ADD(ret5, s_3);
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int32_t ret7 = ADD(ret6, t_3);
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int32_t ret8 = ADD(ret7, y_0);
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ll_16 = RETURN(ll_13, ret8);
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}
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--EXPECT--
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test:
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subq $0x88, %rsp
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movl %edi, (%rsp)
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movl %esi, 4(%rsp)
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movl %edx, 8(%rsp)
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movl %ecx, 0xc(%rsp)
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movl %r9d, 0x10(%rsp)
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movl (%rsp), %eax
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movl %eax, 0x14(%rsp)
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movl 0xc(%rsp), %eax
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movl %eax, 0x18(%rsp)
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movl 0x10(%rsp), %eax
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movl %eax, 0x1c(%rsp)
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movl 0x90(%rsp), %eax
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movl %eax, 0x20(%rsp)
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movl 0x98(%rsp), %eax
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movl %eax, 0x24(%rsp)
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.L1:
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cmpl $0, 0xa0(%rsp)
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je .L2
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movl 8(%rsp), %eax
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imull 4(%rsp), %eax
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movl %eax, 0x28(%rsp)
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movl 0x28(%rsp), %eax
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addl $4, %eax
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movl %eax, 0x2c(%rsp)
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movl 8(%rsp), %eax
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movl %eax, 0x30(%rsp)
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movl 0x30(%rsp), %eax
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movl %eax, 0x44(%rsp)
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movl 0x18(%rsp), %eax
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movl %eax, 0x48(%rsp)
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movl 0x28(%rsp), %eax
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movl %eax, 0x4c(%rsp)
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movl 0x2c(%rsp), %eax
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movl %eax, 0x50(%rsp)
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movl 0x20(%rsp), %eax
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movl %eax, 0x54(%rsp)
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movl 0x24(%rsp), %eax
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movl %eax, 0x58(%rsp)
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jmp .L3
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.L2:
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movl 8(%rsp), %eax
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movl %eax, 0x34(%rsp)
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movl 0x34(%rsp), %eax
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imull 4(%rsp), %eax
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movl %eax, 0x38(%rsp)
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movl 0x14(%rsp), %eax
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imull 4(%rsp), %eax
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movl %eax, 0x3c(%rsp)
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movl 0x3c(%rsp), %eax
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addl $1, %eax
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movl %eax, 0x40(%rsp)
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movl 0x14(%rsp), %eax
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movl %eax, 0x44(%rsp)
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movl 0x34(%rsp), %eax
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movl %eax, 0x48(%rsp)
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movl 0x38(%rsp), %eax
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movl %eax, 0x4c(%rsp)
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movl 0x1c(%rsp), %eax
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movl %eax, 0x50(%rsp)
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movl 0x3c(%rsp), %eax
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movl %eax, 0x54(%rsp)
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movl 0x40(%rsp), %eax
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movl %eax, 0x58(%rsp)
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.L3:
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movl 0x44(%rsp), %eax
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imull 4(%rsp), %eax
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movl %eax, 0x5c(%rsp)
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movl 0x5c(%rsp), %eax
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addl $1, %eax
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movl %eax, 0x60(%rsp)
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cmpl $0, 0xa8(%rsp)
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je .L4
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movl 0x44(%rsp), %eax
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movl %eax, 0x14(%rsp)
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movl 0x48(%rsp), %eax
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movl %eax, 0x18(%rsp)
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movl 0x50(%rsp), %eax
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movl %eax, 0x1c(%rsp)
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movl 0x54(%rsp), %eax
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movl %eax, 0x20(%rsp)
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movl 0x58(%rsp), %eax
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movl %eax, 0x24(%rsp)
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jmp .L1
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.L4:
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movl 0x44(%rsp), %eax
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addl 4(%rsp), %eax
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movl %eax, 0x64(%rsp)
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movl 0x64(%rsp), %eax
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addl 8(%rsp), %eax
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movl %eax, 0x68(%rsp)
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movl 0x68(%rsp), %eax
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addl 0x48(%rsp), %eax
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movl %eax, 0x6c(%rsp)
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movl 0x6c(%rsp), %eax
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addl 0x4c(%rsp), %eax
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movl %eax, 0x70(%rsp)
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movl 0x70(%rsp), %eax
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addl 0x50(%rsp), %eax
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movl %eax, 0x74(%rsp)
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movl 0x74(%rsp), %eax
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addl 0x54(%rsp), %eax
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movl %eax, 0x78(%rsp)
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movl 0x78(%rsp), %eax
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addl 0x58(%rsp), %eax
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movl %eax, 0x7c(%rsp)
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movl 0x7c(%rsp), %eax
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addl 0x60(%rsp), %eax
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movl %eax, 0x80(%rsp)
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movl 0x80(%rsp), %eax
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addq $0x88, %rsp
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retq
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