ir/TODO

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- va_arg nodes
- BSTART, BEND nodes (to free data allocated by ALLOCA)
- ENTRY node for multy-entry units
- guards
- variable name binding
- VLOAD, VSTORE -> SSA
? reassociation folding rules
- folding engine improvement (one rule for few patterns)
- irreducable loops detection/support
- range inference and PI node
- SCCP edge cases
- Folding after SCCP (see combo4.ir)
? instruction selection
- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr
- MOVZX to avoid a SHIFT and AND instruction
- Use CMOVcc to remove branches
- BURS ???
? register allocation
- hints and low priority registers (prevent allocating registers that are used as hints in the following intersecting intervals)
- spill slot coalescing
- optimal spill code placement through resolution
- splinting (spill only at cold path if possible)
- separate INT and FP allocation phases (for performance)
? code generation
- COND
- 32-bit x86 back-end
- ABS_INT
- RETURN_FP
- binary code emission without DynAsm ???
- modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data)
- C front-end
- interpreter
- alias analyzes
- PHP support