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Each instruction consist from 4 sub positions LOAD, USE, DEF, SAVE. Hardware constraints are modeled conectiong live intervals and fixed intervals to different sub-positions.
100 lines
1.9 KiB
Plaintext
100 lines
1.9 KiB
Plaintext
--TEST--
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022: Translation out of SSA (Figure 8 (swap problen) from "Translating Out of Static Single Assignment Form" by Sreedhar)
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--ARGS--
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--save --dump-live-ranges --dump-cfg
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--CODE--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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int32_t c_4 = 1;
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l_1 = START(l_13);
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int32_t x1 = PARAM(l_1, "x", 0);
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int32_t y1 = PARAM(l_1, "y", 1);
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int32_t cond = PARAM(l_1, "z", 2);
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l_3 = END(l_1);
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l_4 = LOOP_BEGIN(l_3, l_9);
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int32_t x2 = PHI(l_4, x1, x3);
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int32_t y2 = PHI(l_4, y1, y3);
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int32_t z = COPY(x2);
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int32_t x3 = COPY(y2);
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int32_t y3 = COPY(z);
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l_7 = IF(l_4, cond);
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l_8 = IF_TRUE(l_7);
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l_9 = LOOP_END(l_8, l_4);
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l_10 = IF_FALSE(l_7);
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l_11 = LOOP_EXIT(l_10, l_4);
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l_12 = BEGIN(l_11);
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l_13 = RETURN(l_12, z);
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}
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--EXPECT--
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{
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uintptr_t c_1 = 0;
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bool c_2 = 0;
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bool c_3 = 1;
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l_1 = START(l_15);
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int32_t d_2 = PARAM(l_1, "x", 0);
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int32_t d_3 = PARAM(l_1, "y", 1);
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int32_t d_4 = PARAM(l_1, "z", 2);
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l_5 = END(l_1);
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l_6 = LOOP_BEGIN(l_5, l_11);
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int32_t d_7 = PHI(l_6, d_2, d_8);
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int32_t d_8 = PHI(l_6, d_3, d_7);
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l_9 = IF(l_6, d_4);
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l_10 = IF_TRUE(l_9);
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l_11 = LOOP_END(l_10, l_6);
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l_12 = IF_FALSE(l_9);
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l_13 = LOOP_EXIT(l_12, l_6);
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l_14 = BEGIN(l_13);
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l_15 = RETURN(l_14, d_7);
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}
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{ # CFG
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BB1:
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start=1
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end=5
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successors(1) [BB2]
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dom_depth=0
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dom_children [BB2]
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BB2:
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start=6
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end=9
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successors(2) [BB3, BB4]
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predecessors(2) [BB1, BB3]
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dom_parent=BB1
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dom_depth=1
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dom_children [BB3, BB4]
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LOOP_HEADER
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loop_depth=1
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BB3:
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start=10
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end=11
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successors(1) [BB2]
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predecessors(1) [BB2]
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dom_parent=BB2
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dom_depth=2
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loop_header=BB2
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loop_depth=1
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mov R1 -> TMP
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mov R2 -> R1
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mov TMP -> R2
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BB4:
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start=12
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end=13
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successors(1) [BB5]
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predecessors(1) [BB2]
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dom_parent=BB2
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dom_depth=2
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dom_children [BB5]
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BB5:
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start=14
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end=15
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predecessors(1) [BB4]
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dom_parent=BB4
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dom_depth=3
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}
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{ # LIVE-RANGES (vregs_count=3)
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R1 (d_2, d_7): [2.2-15.1), DEF(2.2), DEF(7.2), USE(15.1/2)
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R2 (d_3, d_8): [3.2-12.0), DEF(3.2), DEF(8.2)
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R3 (d_4): [4.2-12.0), DEF(4.2), USE(9.1/2)
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}
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