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2022-05-18 21:49:08 +03:00
dynasm Initial import 2022-04-06 00:19:23 +03:00
tests Add support for instructions that modify result directly in memory 2022-05-18 21:49:08 +03:00
.gitignore Added few basic x86_64 tests 2022-04-07 23:24:29 +03:00
gen_ir_fold_hash.c Initial import 2022-04-06 00:19:23 +03:00
ir_cfg.c Initial import 2022-04-06 00:19:23 +03:00
ir_check.c Initial import 2022-04-06 00:19:23 +03:00
ir_disasm.c Added few more basic x86_64 tests 2022-04-08 00:29:49 +03:00
ir_dump.c Take into account spill slot size and alignment 2022-05-16 22:16:29 +03:00
ir_elf.h Initial import 2022-04-06 00:19:23 +03:00
ir_emit_c.c Make DESSA API use "ir_ref" instead of "virtual register number" 2022-05-06 16:19:57 +03:00
ir_fold.h Implement ABS for C code generator 2022-04-21 01:00:46 +03:00
ir_gcm.c Add debug options 2022-04-27 14:47:52 +03:00
ir_gdb.c Initial import 2022-04-06 00:19:23 +03:00
ir_main.c Preallocate call stack 2022-05-17 22:37:13 +03:00
ir_perf.c Initial import 2022-04-06 00:19:23 +03:00
ir_private.h Implement ABS for C code generator 2022-04-21 01:00:46 +03:00
ir_ra.c Remove special support for "_spill_" variable 2022-05-18 17:32:32 +03:00
ir_save.c Code generation for VLOAD and VSTORE 2022-04-19 22:35:29 +03:00
ir_sccp.c Add debug options 2022-04-27 14:47:52 +03:00
ir_strtab.c Initial import 2022-04-06 00:19:23 +03:00
ir_test.c Preallocate call stack 2022-05-17 22:37:13 +03:00
ir_x86.dasc Add support for instructions that modify result directly in memory 2022-05-18 21:49:08 +03:00
ir_x86.h Flexable scratch register constraints (allow MUL %edx) 2022-05-13 15:10:15 +03:00
ir-test.php LSRA cleanup 2022-05-13 12:14:21 +03:00
ir.c Add flexible support for temporary registers. 2022-05-05 22:35:39 +03:00
ir.g VADDR instruction 2022-04-20 12:00:36 +03:00
ir.h Introduce IR_PREALLOCATED_STACK flag 2022-05-17 13:15:41 +03:00
Makefile Allow using debug_regset in RELEASE build 2022-05-13 09:22:31 +03:00
test.ir Initial import 2022-04-06 00:19:23 +03:00
TODO Add support for instructions that modify result directly in memory 2022-05-18 21:49:08 +03:00