.. |
aarch64
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Remove useless "AVX" tests for AArch64
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2023-04-18 10:14:59 +03:00 |
c
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
debug
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Avoid reservaton of temporary resiser for argument passing
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2023-04-26 12:16:05 +03:00 |
debug.aarch64
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Fix previous commit. We still need a temporary register for indirect calls.
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2023-04-26 14:10:58 +03:00 |
debug.Windows-x86_64
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Fixed test
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2023-04-26 14:24:43 +03:00 |
debug.x86
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Fix previous commit. We still need a temporary register for indirect calls.
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2023-04-26 14:10:58 +03:00 |
folding
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Add more folding rules
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2023-03-29 14:07:31 +03:00 |
Windows-x86_64
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Fix tests with capstone 5
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2023-03-02 17:54:50 +03:00 |
x86
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Fix fusion of IF(_, CMP(AND(_, _) 0))
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2023-03-28 19:03:06 +03:00 |
x86_64
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Fix fusion of IF(_, CMP(AND(_, _) 0))
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2023-03-28 19:03:06 +03:00 |
001.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
002.irt
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typo
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2022-08-23 17:02:34 +03:00 |
003.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
004.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
005.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
006.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
007.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
008.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
009.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
010.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
011.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
012.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
013.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
014.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
015.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
016.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
017.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
018.irt
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Initial import
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2022-04-06 00:19:23 +03:00 |
019.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
020.irt
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Reimplement JMP optimization
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2022-08-30 23:15:20 +03:00 |
021.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
022.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
023.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
024.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
025.irt
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Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.
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2023-03-23 00:47:27 +03:00 |
dead_load_001.irt
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Extend SCCP to perform Dead Load Elimination
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2022-11-08 15:39:00 +03:00 |
dead_load_002.irt
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Extend SCCP to perform Dead Load Elimination
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2022-11-08 15:39:00 +03:00 |
dead_load_003.irt
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Extend SCCP to perform Dead Load Elimination
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2022-11-08 15:39:00 +03:00 |
fibi_min.irt
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Add test
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2023-03-22 22:09:25 +03:00 |