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47 lines
1.3 KiB
Plaintext
47 lines
1.3 KiB
Plaintext
- va_arg nodes
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- BSTART, BEND nodes (to free data allocated by ALLOCA)
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- ENTRY node for multy-entry units
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- guards
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- variable name binding
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- VLOAD, VSTORE -> SSA
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? reassociation folding rules
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- folding engine improvement (one rule for few patterns)
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- irreducable loops detection/support
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- range inference and PI node
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- SCCP edge cases
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- Folding after SCCP (see combo4.ir)
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- local scheduling according to data dependencies, register presure and pipeline stalls
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? instruction selection
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- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr
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- MOVZX to avoid a SHIFT and AND instruction
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- Use CMOVcc to remove branches
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- BURS ???
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? register allocation
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- hints and low priority registers (prevent allocating registers that are used as hints in the following intersecting intervals)
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- spill slot coalescing
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- optimal spill code placement through resolution
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- splinting (spill only at cold path if possible)
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- separate INT and FP allocation phases (for performance)
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? code generation
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- COND
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- 32-bit x86 back-end
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- binary code emission without DynAsm ???
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? disassembler
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- .rodata section and relative data labels
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- modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data)
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- C front-end
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- interpreter
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- alias analyzes
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- PHP support
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