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Use zero-extended load if possible
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parent
207dca73e8
commit
a1366ebd92
3
TODO
3
TODO
@ -29,9 +29,6 @@
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- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr, maxss, maxsd, minss, minsd
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- MOVZX to avoid a SHIFT and AND instruction
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- Using CMOVcc to remove branches
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- mov rax, 123456789abcdef0h ; 10 bytes (64-bit constant)
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- mov rax, -100 ; 7 bytes (32-bit sign-extended)
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- mov eax, 100 ; 5 bytes (32-bit zero-extended)
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? register allocation
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+ linear scan
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@ -187,11 +187,15 @@
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| lea Ra(dst), aword [=>label]
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|| _insn->emit_const = 1;
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|| } else if (ir_type_size[type] == 8 && !IR_IS_SIGNED_32BIT(_insn->val.i64)) {
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| mov64 Ra(dst), _insn->val.i64
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|| if (IR_IS_UNSIGNED_32BIT(_insn->val.u64)) {
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| mov Rd(dst), _insn->val.u32 // zero extended load
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|| } else {
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| mov64 Ra(dst), _insn->val.i64
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|| }
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|| } else if (_insn->val.i64 == 0) {
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| ASM_REG_REG_OP xor, type, dst, dst
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|| } else {
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| ASM_REG_IMM_OP mov, type, dst, _insn->val.i32
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| ASM_REG_IMM_OP mov, type, dst, _insn->val.i32 // sign extended load
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|| }
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|| } else {
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|| ir_reg _reg = ir_ref_reg(ctx, src);
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