Dmitry Stogov
d1fcaa3e63
Fixed code style
2023-05-22 20:08:36 +03:00
Tony Su
4cdd3eba77
[Fix]: ir_print_const() prints enclosing quote or not
...
Current ir_print_const() will by default print out the enclosing double
quote for any string, but this will lead to syntax error in dumped dot
file by ir_dump_dot() reported by 'dot' command.
ir_print_const() now has the fourth parameter to indicate whether prints
out the enclosing double quote(") or not.
OLD: ir_print_const(const ir_ctx *ctx, const ir_insn *insn, FILE *f)
NEW: ir_print_const(const ir_ctx *ctx, const ir_insn *insn, FILE *f, bool quoted)
Signed-off-by: Tony Su <tao.su@intel.com>
2023-05-22 21:02:46 +08:00
Dmitry Stogov
c93abd79b2
Remove IR_OPND_VAR
2023-05-19 13:00:55 +03:00
Dmitry Stogov
1749168078
Add ir_insn_len() and ir_insn_inputs_to_len() private helpers
2023-04-21 13:40:55 +03:00
Dmitry Stogov
d71cbd47d5
Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point
2023-04-07 16:36:27 +03:00
Dmitry Stogov
1e5e9e08ce
Re-implement instruction fusion and live-range construction
2023-04-05 19:20:43 +03:00
Dmitry Stogov
ba0fa44447
Add "const" modifiers
2023-03-28 13:18:12 +03:00
Dmitry Stogov
2406b13359
Improve graph visualization
2023-03-23 03:22:13 +03:00
Dmitry Stogov
87dbdcea0d
Add necessary compensation loads for bounded nodes when enter into function through OSR entry-point
2023-03-21 13:45:37 +03:00
Dmitry Stogov
8871550542
Show EBTRY nodes and "fake" control edges differently
2023-03-17 09:20:00 +03:00
Dmitry Stogov
3535fd2fc4
Fix compilation warnings and signed/unsigned mess
2022-11-08 23:09:35 +03:00
Dmitry Stogov
cc56f12f13
Add LICENSE and copyright notices
2022-11-08 11:32:46 +03:00
Dmitry Stogov
e6f6e92d66
Improve spill code fusion
2022-09-15 17:52:28 +03:00
Dmitry Stogov
ca109d3fc9
Use single live interval to handle all scratch registers clobbered by CALL
2022-08-11 19:56:59 +03:00
Dmitry Stogov
a165c43196
Initial support for thread local storage + optimization of some related code selection patterns
2022-06-22 16:02:43 +03:00
Dmitry Stogov
5ef1e97261
Better support for unreachable basic blocks
2022-06-20 16:34:44 +03:00
Dmitry Stogov
3f6c1ee0f5
cleanup
2022-06-15 22:48:19 +03:00
Dmitry Stogov
ba6bb796a4
Fix "dot" graphs
2022-06-15 17:31:59 +03:00
Dmitry Stogov
41f3e43cf7
cleanup
2022-05-27 13:18:04 +03:00
Dmitry Stogov
463002107a
Rename "gcm_blocks" into "cfg_map"
2022-05-25 09:33:47 +03:00
Dmitry Stogov
911219493d
Implement IJMP instruction (indirect jump or computed goto)
2022-05-19 18:56:48 +03:00
Dmitry Stogov
6fb5380906
Take into account spill slot size and alignment
2022-05-16 22:16:29 +03:00
Dmitry Stogov
e8dd422167
Cleanup "top" usage
2022-05-16 10:19:30 +03:00
Dmitry Stogov
3dac541928
LSRA cleanup
2022-05-13 12:14:21 +03:00
Dmitry Stogov
1f673ebfda
Better temporary register usage for SSA deconstruction
2022-05-13 00:32:37 +03:00
Dmitry Stogov
f8edcb9762
Fix possible crash
2022-05-11 18:18:28 +03:00
Dmitry Stogov
6d7ea2fd37
Prevent crash when dump dessa moves with -O0
2022-05-11 17:05:29 +03:00
Dmitry Stogov
69b5a852e5
Make DESSA API use "ir_ref" instead of "virtual register number"
...
(0 - is still a temporary register)
2022-05-06 16:19:57 +03:00
Dmitry Stogov
dd5a3a3b72
Add flexible support for temporary registers.
...
Get rid of hardcoded temporary registers (incomplete)
2022-05-05 22:35:39 +03:00
Dmitry Stogov
2b9e793b4e
Add debug options
2022-04-27 14:47:52 +03:00
Dmitry Stogov
c36efda8a5
Improve register allocation for commutative instructions
...
- swap operands f this make sense
- fix coalescing bug
2022-04-21 16:38:18 +03:00
Dmitry Stogov
016a7c14d7
Fixed format
2022-04-19 22:41:51 +03:00
Dmitry Stogov
6b60d8fba9
Code generation for VLOAD and VSTORE
2022-04-19 22:35:29 +03:00
Dmitry Stogov
0922b7cd7f
Add vreg hints
2022-04-15 16:02:23 +03:00
Dmitry Stogov
3f6a6aa3ea
Better CPU constraint model and initial support for live interval splitting (incomplete)
2022-04-14 22:40:13 +03:00
Dmitry Stogov
9ccefcf973
Support for more instruction in C backend and BOOL_NOT in x86_86
2022-04-08 19:02:11 +03:00
Dmitry Stogov
5b34386f62
Register Allocator suppor for fixed registers, use positions and register hints (incomplete).
2022-04-07 11:11:57 +03:00
Dmitry Stogov
2937993190
Initial import
2022-04-06 00:19:23 +03:00
