6 Commits

Author	SHA1	Message	Date
Dmitry Stogov	7058c41411	More accurate spill loads optimization for instructions that reuse op1 register for result ... This also fixes possbile incorrect register-allocation/code-generation for SHIFT instuction on x86[_64]	2023-06-29 12:42:44 +03:00
Dmitry Stogov	24e8e216a1	Remove a "reference" edge from LOOP_END to LOOP_BEGIN node.	2023-03-23 00:47:27 +03:00
Dmitry Stogov	7e782a291a	Extend disassembler to support .rodata section and IP relative data labels	2022-05-26 01:17:02 +03:00
Dmitry Stogov	19e93fd3f6	Allow multi-target test suite	2022-05-25 17:38:22 +03:00
Dmitry Stogov	d3c1e4a02f	Reorder basic blocks to reduce number of jumps and improve code locality	2022-05-24 00:43:35 +03:00
Dmitry Stogov	84b2bac02c	Add more tests	2022-04-22 00:11:34 +03:00