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554 Commits 2 Branches 0 Tags 3.2 MiB
9f0bf4849f
Commit Graph

92 Commits

Author SHA1 Message Date
Dmitry Stogov
9f0bf4849f Fix build 2022-12-26 14:44:57 +03:00
Dmitry Stogov
1df594fea5 Fix memory leak 2022-12-26 14:17:48 +03:00
Dmitry Stogov
4d7386d342 Fix support for spill loads 2022-12-15 23:27:30 +03:00
Dmitry Stogov
52842a094a Require temporary register for passing argument through stack 2022-12-12 18:14:31 +03:00
Dmitry Stogov
6790ebf3b5 Implement AFREE instruction to revert ALLOCA 2022-12-07 13:09:00 +03:00
Dmitry Stogov
efbc51baaa Fixed codegeneration for TRUNC on aarch64 2022-12-07 11:56:53 +03:00
Dmitry Stogov
374df90797 Fix missing sill store 2022-12-07 00:02:02 +03:00
Dmitry Stogov
6a4e239773 Create a sparate pass to remove unreachableble CFG blocks. 
SCCP pass removes unreachable blocks before CFG construction.
In case of -O0 or -O1 pipeline (without SCCP) it's simpler and faster
to unlink unreachable CFG blocks once, then check for reachability
in almost any compilation pass.
-O2 pipeline (with SCCP) don't need this pass.
 2022-11-29 20:02:07 +03:00
Dmitry Stogov
c9212a1f57 Add missed slot for "fixed" live_intervals for all "scratch" registers 2022-11-22 09:26:25 +03:00
Dmitry Stogov
ef6c59ad8f Avoid instruction selection for the first instructionis of basic blocks 2022-11-18 15:07:19 +03:00
Dmitry Stogov
dde8309108 Use reference to previous instruction instead of its length 2022-11-18 13:59:49 +03:00
Dmitry Stogov
00395f0a23 Cleanup: separate ir_phi_input_number() function 2022-11-18 10:11:16 +03:00
Dmitry Stogov
3e3746d5cb Refactor API that expose target CPU register constraints for register allocator 2022-11-17 23:30:35 +03:00
Dmitry Stogov
7015050f22 Simplify CMP_AND_BRANCH and GUARD_CMP via introducing SKIP_CMP rule 2022-11-16 14:09:04 +03:00
Dmitry Stogov
673779ba6a Use IR_COPY_INT/FP rule instead of IR_COPY op 2022-11-16 12:55:40 +03:00
Dmitry Stogov
3535fd2fc4 Fix compilation warnings and signed/unsigned mess 2022-11-08 23:09:35 +03:00
Dmitry Stogov
cc73788981 Fix compilation warnings 2022-11-08 18:17:29 +03:00
Dmitry Stogov
cc56f12f13 Add LICENSE and copyright notices 2022-11-08 11:32:46 +03:00
Dmitry Stogov
d619efa0ad Add support for ENDBR 2022-10-27 12:58:04 +03:00
Dmitry Stogov
3af9e1a062 Move some common code into ir_emit.c 2022-10-26 22:52:19 +03:00
Dmitry Stogov
1b84570aa3 Intoduce ir_emit.c that shuould keep common part for different targets 2022-10-26 22:06:07 +03:00
Dmitry Stogov
74debb0bf4 Add "ir_load.c" to allow build without llk.php and initial multi-platform support 2022-10-26 19:52:14 +03:00
Dmitry Stogov
9b7835a05e Use ir_emit_exitgroup() helper API instead of IR_EXITGROUP node 2022-10-26 15:46:59 +03:00
Dmitry Stogov
edd7bc7101 Access ctx->rules[] trough inline function with assertion 
Fix incorrect accesses
 2022-10-26 12:49:34 +03:00
Dmitry Stogov
b99d98979f Limit CMP+GUARD fusing 2022-10-25 22:09:32 +03:00
Dmitry Stogov
006bee10c7 Add checks for constant references before checking the corresponding rule 2022-10-25 20:36:22 +03:00
Dmitry Stogov
ba90e2825e SNAPSHOT data shouldn't be in registers 2022-10-25 12:22:49 +03:00
Dmitry Stogov
9f472c1c91 Add support for deoptimization and binding to multiple slots 2022-10-21 17:16:25 +03:00
Dmitry Stogov
81c90972d6 Avoid useless spill stores 2022-10-12 12:09:52 +03:00
Dmitry Stogov
678da7fcc1 Use proper MOV instructions 2022-10-12 12:01:49 +03:00
Dmitry Stogov
0da4b43de8 Fix second argument address 2022-09-29 14:17:54 +03:00
Dmitry Stogov
33bc4ce956 Fixed comparison with zero 2022-09-29 11:31:07 +03:00
Dmitry Stogov
a6e4e988d0 Fix ARM code generator 2022-09-29 02:10:44 +03:00
Dmitry Stogov
494c9225a9 Refactor trace related helpers 2022-09-29 01:25:42 +03:00
Dmitry Stogov
fdaa0cea54 Ignore dead TLS loads 2022-09-28 21:56:10 +03:00
Dmitry Stogov
408b8d2e4b Fixed support for GUARD/GUARD_NOT 2022-09-27 16:52:15 +03:00
Dmitry Stogov
31220b1de9 Add code generators for missing GUARDs 2022-09-26 20:47:29 +03:00
Dmitry Stogov
63f21925b3 Avoid useless move 2022-09-20 00:26:56 +03:00
Dmitry Stogov
eacb9c1528 Avoid useless mov 2022-09-20 00:12:06 +03:00
Dmitry Stogov
5fdb89aee1 MOD may be converted to AND only for positive op1 2022-09-19 23:22:11 +03:00
Dmitry Stogov
5123080533 Fixed register allocation for MUL_OV 2022-09-19 22:10:29 +03:00
Dmitry Stogov
dc0393320e Fix floating point comparison 2022-09-19 21:55:08 +03:00
Dmitry Stogov
76ad4e59a6 Fix live range 2022-09-16 12:47:03 +03:00
Dmitry Stogov
0eee478277 Support for always TRUE/FALSE guards 2022-09-16 12:29:55 +03:00
Dmitry Stogov
b519f80da5 More accurte fusion of address calculation 2022-09-16 12:05:36 +03:00
Dmitry Stogov
367e47ac30 Support for preallocated stack (ZEND_VM_HYBRID_JIT_RED_ZONE_SIZE in PHP VM) 2022-09-15 15:39:15 +03:00
Dmitry Stogov
ad59556d85 Add support for binding IR nodes to "external" spill slots (e.g. PHP VM stack slots) 2022-09-15 15:26:43 +03:00
Dmitry Stogov
05bc456c6a Move base regester selection code into ir_ref_spill_slot() 2022-09-07 23:47:30 +03:00
Dmitry Stogov
2677299bbd Fix invalid type 2022-09-07 22:21:12 +03:00
Dmitry Stogov
fb0d5fd87c Improve GUARD instructions support 2022-09-02 13:54:31 +03:00