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487 Commits

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Author SHA1 Message Date
Dmitry Stogov
ecb9719e8b Fix "long" PHI handling 2022-10-12 14:01:56 +03:00
Dmitry Stogov
81c90972d6 Avoid useless spill stores 2022-10-12 12:09:52 +03:00
Dmitry Stogov
678da7fcc1 Use proper MOV instructions 2022-10-12 12:01:49 +03:00
Dmitry Stogov
6e0415a44d Fix SCCP for PHIs 2022-10-12 12:01:28 +03:00
Dmitry Stogov
c74cac2556 Fix support for "long" PHIs 2022-10-12 11:59:49 +03:00
Dmitry Stogov
3ef58e5c2e Take into account RLOADs for non fixed registers 2022-10-11 22:23:09 +03:00
Dmitry Stogov
f5c0151740 Remove hints to the same virtual register 2022-10-05 20:31:20 +03:00
Dmitry Stogov
e9402c8436 Add hint for "op1" if result reuses "op1" register. 
This improves register allocation if regiter for result was coalesced and allocated before the register for operand.
 2022-10-05 17:58:37 +03:00
Dmitry Stogov
d2a0347b21 Merge basic blocks by removing connected END to BEGIN nodes 2022-10-05 16:29:49 +03:00
Dmitry Stogov
db8a80e8d5 Temporary remove "pxor". 
It should be added before all "cvt*" instructions
 2022-09-29 20:05:00 +03:00
Dmitry Stogov
a98124a552 External __jit_debug_register_code() is necessary only on ARM 2022-09-29 17:10:32 +03:00
Dmitry Stogov
0da4b43de8 Fix second argument address 2022-09-29 14:17:54 +03:00
Dmitry Stogov
33bc4ce956 Fixed comparison with zero 2022-09-29 11:31:07 +03:00
Dmitry Stogov
a6e4e988d0 Fix ARM code generator 2022-09-29 02:10:44 +03:00
Dmitry Stogov
c3e6a71dda Allow using external __jit_debug_register_code(). 
Fuinction defined in DSO may work improperly.
 2022-09-29 01:28:30 +03:00
Dmitry Stogov
494c9225a9 Refactor trace related helpers 2022-09-29 01:25:42 +03:00
Dmitry Stogov
81f1108049 Add task 2022-09-28 21:58:38 +03:00
Dmitry Stogov
fdaa0cea54 Ignore dead TLS loads 2022-09-28 21:56:10 +03:00
Dmitry Stogov
a1361d77ba Support for calling FASTCALL variable functions. 
Currutly this done through BITCAST hack.
It may make sense to implement full support for function prototypes.
 2022-09-28 20:48:35 +03:00
Dmitry Stogov
36b59306ee Add task 2022-09-28 14:59:16 +03:00
Dmitry Stogov
66b62b7447 Fix use after reallocation 2022-09-28 14:31:46 +03:00
Dmitry Stogov
924f5949f2 Fixed SSE operands alignment and 32-bit support 2022-09-27 20:36:34 +03:00
Dmitry Stogov
408b8d2e4b Fixed support for GUARD/GUARD_NOT 2022-09-27 16:52:15 +03:00
Dmitry Stogov
31220b1de9 Add code generators for missing GUARDs 2022-09-26 20:47:29 +03:00
Dmitry Stogov
da11454058 Fix incorrect code for IJMP 2022-09-26 14:45:12 +03:00
Dmitry Stogov
2b4a7d2cb3 Fix out of bounds array access 2022-09-23 12:36:11 +03:00
Dmitry Stogov
8f5768628a Initial support for tracing JIT 2022-09-23 12:22:59 +03:00
Dmitry Stogov
05fd1f971d Better LOAD fusion 2022-09-21 23:54:45 +03:00
Dmitry Stogov
12c183f391 Added support for GUARD_OVERFLOW 2022-09-20 17:38:27 +03:00
Dmitry Stogov
c186fb2c25 Fix constant address loading 2022-09-20 14:37:10 +03:00
Dmitry Stogov
45fff1fe5f Implement binding IR node to VAR (assign spill slot) 2022-09-20 11:03:25 +03:00
Dmitry Stogov
ba748d5bd4 Simplify loop exit condition 2022-09-20 10:42:38 +03:00
Dmitry Stogov
23caf1e0d1 Fix incorrect starting operand number 2022-09-20 10:38:59 +03:00
Dmitry Stogov
63f21925b3 Avoid useless move 2022-09-20 00:26:56 +03:00
Dmitry Stogov
eacb9c1528 Avoid useless mov 2022-09-20 00:12:06 +03:00
Dmitry Stogov
5fdb89aee1 MOD may be converted to AND only for positive op1 2022-09-19 23:22:11 +03:00
Dmitry Stogov
5123080533 Fixed register allocation for MUL_OV 2022-09-19 22:10:29 +03:00
Dmitry Stogov
dc0393320e Fix floating point comparison 2022-09-19 21:55:08 +03:00
Dmitry Stogov
76ad4e59a6 Fix live range 2022-09-16 12:47:03 +03:00
Dmitry Stogov
0eee478277 Support for always TRUE/FALSE guards 2022-09-16 12:29:55 +03:00
Dmitry Stogov
b519f80da5 More accurte fusion of address calculation 2022-09-16 12:05:36 +03:00
Dmitry Stogov
86bec14bc2 Fixed fuse loading in BITCAST 2022-09-16 10:19:31 +03:00
Dmitry Stogov
4a8ebd5be5 Fuse function address load into CALL/TAILCALL without arguments 2022-09-16 09:54:49 +03:00
Dmitry Stogov
57a9731179 Fix spill load code 2022-09-15 23:24:28 +03:00
Dmitry Stogov
9aac7e76af Requre opearnad to be in register 2022-09-15 22:18:35 +03:00
Dmitry Stogov
a0c9405ae7 Fixed memory leak 2022-09-15 20:32:20 +03:00
Dmitry Stogov
b549d98aba The second operand for MEM_BINOP_INT must be in a register 2022-09-15 20:29:30 +03:00
Dmitry Stogov
8a05b4ddeb Make ADDR to be compatible with U64 or U32 2022-09-15 18:01:32 +03:00
Dmitry Stogov
e6f6e92d66 Improve spill code fusion 2022-09-15 17:52:28 +03:00
Dmitry Stogov
367e47ac30 Support for preallocated stack (ZEND_VM_HYBRID_JIT_RED_ZONE_SIZE in PHP VM) 2022-09-15 15:39:15 +03:00