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f8ca41119c
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Author SHA1 Message Date
Anatol Belski
f8ca41119c cpu: Add framework for CPU feature handling 
This comes with the initial feature to query CPUID on x86. Supported are
both GCC based build and MSVC builds targeting Windows.

Signed-off-by: Anatol Belski <anbelski@linux.microsoft.com>
 2023-04-15 01:08:36 +02:00
Dmitry Stogov
204251a83c Update tasks 2023-04-14 10:45:56 +03:00
Dmitry Stogov
ac7f9a3a02 Improve ir_compute_live_ranges() 2023-04-14 01:47:47 +03:00
Dmitry Stogov
1115e7fb6e cleanup 2023-04-13 21:45:38 +03:00
Dmitry Stogov
44f048ecd9 Reorder fields to reduce the structure size 2023-04-13 21:37:39 +03:00
Dmitry Stogov
2a17b87219 LSRA optimization 2023-04-13 20:56:49 +03:00
Dmitry Stogov
e5c01495da Use arena to allocate live_intervals and nested data structures 2023-04-13 13:47:16 +03:00
Dmitry Stogov
0b78a322f8 Cache deleted live ranges in ir_ctx.unused_ranges 2023-04-13 11:42:47 +03:00
Dmitry Stogov
1f447a538b Better iterative DCE after SCCP 2023-04-13 10:39:00 +03:00
Dmitry Stogov
7d395532d9 Simplify ir_assign_virtual_registers() 2023-04-13 03:01:08 +03:00
Dmitry Stogov
f85f5fd2a8 Remove data dependency between TAILCALL and UNREACHABLE 2023-04-13 02:41:28 +03:00
Dmitry Stogov
96761ed6cb Fix compilation warnings 2023-04-12 22:45:53 +03:00
Dmitry Stogov
04795b9f04 Fix compilation warnings 2023-04-12 10:48:30 +03:00
Dmitry Stogov
d71cbd47d5 Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point 2023-04-07 16:36:27 +03:00
Dmitry Stogov
efa8a83153 Fix spilling code for arguments passed theought stack and change RA to 
prefer reusing the same register for splitted intervals
i#	utils/
 2023-04-06 00:16:49 +03:00
Dmitry Stogov
1e5e9e08ce Re-implement instruction fusion and live-range construction 2023-04-05 19:20:43 +03:00
Dmitry Stogov
b109e2f2cd Disable LOAD fusion if there is a STORE or CALL between LOAD and its use 2023-03-30 19:07:21 +03:00
Dmitry Stogov
ee827ee983 Don't create two DEF UsePos 2023-03-29 17:22:49 +03:00
Dmitry Stogov
d79bd88f6f Improve x86 code generation for passing address of label to stack 
-       leal .L1, %eax
-       movl %eax, (%esp)
+       movl $.L1, (%esp)
 2023-03-29 15:48:41 +03:00
Dmitry Stogov
5bed3d73a5 Fix test 2023-03-29 15:13:17 +03:00
Dmitry Stogov
7164bc30e4 Fix "diff" on Windows 2023-03-29 15:08:05 +03:00
Dmitry Stogov
b63041199e Add --show-diff for Windows CI test 2023-03-29 14:53:50 +03:00
Dmitry Stogov
b193a348c5 Add --show-diff for Windows CI test 2023-03-29 14:43:54 +03:00
Dmitry Stogov
26e462fa42 Add more folding rules 2023-03-29 14:07:31 +03:00
Dmitry Stogov
1058cde808 Cleanup instruction selector 2023-03-29 01:21:54 +03:00
Dmitry Stogov
e4b618ad00 Fix fusion of IF(_, CMP(AND(_, _) 0)) 2023-03-28 19:03:06 +03:00
Dmitry Stogov
2940f9e281 Remove *.ir and *.out files for passed tests and generate *.exp and *.diff for all failed tests 2023-03-28 18:06:35 +03:00
Dmitry Stogov
2cf5f1a7ff typo 2023-03-28 16:59:46 +03:00
Dmitry Stogov
f058ecfc93 Prefer IR_TARGET_* checks instead of system specific macros 2023-03-28 13:40:44 +03:00
Dmitry Stogov
37b94c3f04 Fix 32-bit clang build 2023-03-28 13:20:54 +03:00
Dmitry Stogov
ba0fa44447 Add "const" modifiers 2023-03-28 13:18:12 +03:00
Dmitry Stogov
52ab3439d1
Merge pull request #20 from weltling/fixups_00 
fixups: Minor improvements to ir.h, ir_builder.h and ir_init
 2023-03-28 10:26:30 +03:00
Anatol Belski
d0b4f108ee ir_init: Accept flags as an additional arguments 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-03-28 00:00:45 +02:00
Anatol Belski
b701684704 ir_init: Expose min limit for constants and instructions 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-03-28 00:00:45 +02:00
Anatol Belski
f55b9b094b doc: Add short comments to some flags 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-03-28 00:00:44 +02:00
Anatol Belski
091a24d53f C++: Add guards for relevant headers 
Signed-off-by: Anatol Belski <ab@php.net>
 2023-03-27 00:49:38 +02:00
Dmitry Stogov
2392f546bf Improve merging of sorted lists 2023-03-24 12:42:41 +03:00
Dmitry Stogov
46f07a8222 Remove unnecessary checks 2023-03-24 00:51:08 +03:00
Dmitry Stogov
72a5649236 Reorder conditions and avoid reloading 2023-03-23 23:44:59 +03:00
Dmitry Stogov
7e687262f7 Remove always true conditions 2023-03-23 22:16:05 +03:00
Dmitry Stogov
2406b13359 Improve graph visualization 2023-03-23 03:22:13 +03:00
Dmitry Stogov
6d36fb12c3 Fix example code and test 2023-03-23 00:54:47 +03:00
Dmitry Stogov
24e8e216a1 Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
Dmitry Stogov
f5e84ec44c Simplify compilation pipeline 2023-03-22 23:58:08 +03:00
Dmitry Stogov
ccbf3da286 Add test 2023-03-22 22:09:25 +03:00
Dmitry Stogov
83edc3f8a1 Disable LICM for overflow checking math 2023-03-22 12:07:05 +03:00
Dmitry Stogov
b1f2167ea5 Calculate number of ENTRY blocks during CFG construction to avoid an eaxtra loop for ctx->entries[] gathering at ir_match() 2023-03-22 10:21:56 +03:00
Dmitry Stogov
e5abfc119d Print BIND-ing information for LOAD nodes 2023-03-21 18:06:47 +03:00
Dmitry Stogov
ba56eb5497 Fix typo 2023-03-21 17:07:21 +03:00
Dmitry Stogov
50b3a7df35 Don't print BIND-ing information for removed nodes (replaced by NOPs) 2023-03-21 13:53:06 +03:00