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dynasm
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Initial import
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2022-04-06 00:19:23 +03:00 |
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tests
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Take into account spill slot size and alignment
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2022-05-16 22:16:29 +03:00 |
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.gitignore
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Added few basic x86_64 tests
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2022-04-07 23:24:29 +03:00 |
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gen_ir_fold_hash.c
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_cfg.c
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_check.c
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_disasm.c
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Added few more basic x86_64 tests
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2022-04-08 00:29:49 +03:00 |
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ir_dump.c
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Take into account spill slot size and alignment
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2022-05-16 22:16:29 +03:00 |
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ir_elf.h
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_emit_c.c
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Make DESSA API use "ir_ref" instead of "virtual register number"
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2022-05-06 16:19:57 +03:00 |
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ir_fold.h
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Implement ABS for C code generator
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2022-04-21 01:00:46 +03:00 |
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ir_gcm.c
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Add debug options
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2022-04-27 14:47:52 +03:00 |
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ir_gdb.c
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_main.c
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Allow using debug_regset in RELEASE build
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2022-05-13 09:22:31 +03:00 |
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ir_perf.c
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_private.h
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Implement ABS for C code generator
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2022-04-21 01:00:46 +03:00 |
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ir_ra.c
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Use a kind of "Buddy Allocaor" to pack spill slots of different sizes
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2022-05-17 00:17:59 +03:00 |
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ir_save.c
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Code generation for VLOAD and VSTORE
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2022-04-19 22:35:29 +03:00 |
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ir_sccp.c
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Add debug options
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2022-04-27 14:47:52 +03:00 |
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ir_strtab.c
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Initial import
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2022-04-06 00:19:23 +03:00 |
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ir_test.c
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Allow using debug_regset in RELEASE build
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2022-05-13 09:22:31 +03:00 |
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ir_x86.dasc
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clenup
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2022-05-17 09:09:45 +03:00 |
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ir_x86.h
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Flexable scratch register constraints (allow MUL %edx)
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2022-05-13 15:10:15 +03:00 |
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ir-test.php
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LSRA cleanup
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2022-05-13 12:14:21 +03:00 |
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ir.c
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Add flexible support for temporary registers.
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2022-05-05 22:35:39 +03:00 |
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ir.g
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VADDR instruction
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2022-04-20 12:00:36 +03:00 |
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ir.h
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Allow using debug_regset in RELEASE build
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2022-05-13 09:22:31 +03:00 |
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Makefile
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Allow using debug_regset in RELEASE build
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2022-05-13 09:22:31 +03:00 |
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test.ir
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Initial import
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2022-04-06 00:19:23 +03:00 |
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TODO
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Update tasks
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2022-05-17 00:21:00 +03:00 |
