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c9fa8dfebd
ir/tests
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Dmitry Stogov c9fa8dfebd Fixed SSA deconstruction 
Previously we performed parallel copy for virtual registers, now we do
the same for the target CPU registers.
2023-05-17 22:37:45 +03:00
..
aarch64 Remove useless "AVX" tests for AArch64 2023-04-18 10:14:59 +03:00
c Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
debug Fixed SSA deconstruction 2023-05-17 22:37:45 +03:00
debug.aarch64 Fixed SSA deconstruction 2023-05-17 22:37:45 +03:00
debug.Windows-x86_64 Fixed test 2023-04-26 14:24:43 +03:00
debug.x86 Fixed SSA deconstruction 2023-05-17 22:37:45 +03:00
folding Add more folding rules 2023-03-29 14:07:31 +03:00
Windows-x86_64 Fix tests with capstone 5 2023-03-02 17:54:50 +03:00
x86 Fix fusion of IF(_, CMP(AND(_, _) 0)) 2023-03-28 19:03:06 +03:00
x86_64 Fix fusion of IF(_, CMP(AND(_, _) 0)) 2023-03-28 19:03:06 +03:00
001.irt Initial import 2022-04-06 00:19:23 +03:00
002.irt typo 2022-08-23 17:02:34 +03:00
003.irt Initial import 2022-04-06 00:19:23 +03:00
004.irt Initial import 2022-04-06 00:19:23 +03:00
005.irt Initial import 2022-04-06 00:19:23 +03:00
006.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
007.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
008.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
009.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
010.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
011.irt Initial import 2022-04-06 00:19:23 +03:00
012.irt Initial import 2022-04-06 00:19:23 +03:00
013.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
014.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
015.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
016.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
017.irt Initial import 2022-04-06 00:19:23 +03:00
018.irt Initial import 2022-04-06 00:19:23 +03:00
019.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
020.irt Reimplement JMP optimization 2022-08-30 23:15:20 +03:00
021.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
022.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
023.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
024.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
025.irt Remove a "reference" edge from LOOP_END to LOOP_BEGIN node. 2023-03-23 00:47:27 +03:00
dead_load_001.irt Extend SCCP to perform Dead Load Elimination 2022-11-08 15:39:00 +03:00
dead_load_002.irt Extend SCCP to perform Dead Load Elimination 2022-11-08 15:39:00 +03:00
dead_load_003.irt Extend SCCP to perform Dead Load Elimination 2022-11-08 15:39:00 +03:00
fibi_min.irt Add test 2023-03-22 22:09:25 +03:00