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779 Commits

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Author SHA1 Message Date
Dmitry Stogov
2b9e793b4e Add debug options 2022-04-27 14:47:52 +03:00
Dmitry Stogov
c89246f35a Replace asserts with checks 2022-04-27 01:34:29 +03:00
Dmitry Stogov
329e1f5a44 Fix splitting (incomplete) 2022-04-27 01:04:03 +03:00
Dmitry Stogov
310f605d6c Fix register clobbering 2022-04-26 22:49:41 +03:00
Dmitry Stogov
beaa2744e1 Keep fixed live intervals after coalescing 2022-04-26 21:16:22 +03:00
Dmitry Stogov
1370629b47 Fixed interval sorting 2022-04-26 11:51:48 +03:00
Dmitry Stogov
6548818887 Improve interval splitting (incomplete) 2022-04-26 00:54:07 +03:00
Dmitry Stogov
648d7084bc Fix intrval reconstruction after operand swapping 2022-04-25 21:00:01 +03:00
Dmitry Stogov
99e2b4c3fd Remove done and add new tasks 2022-04-22 13:31:28 +03:00
Dmitry Stogov
4a6c8d60a6 Fix ALLOCA to align stack frame 2022-04-22 12:55:38 +03:00
Dmitry Stogov
5cb0af8cd9 Support for compound assignment instructions 2022-04-22 12:11:30 +03:00
Dmitry Stogov
549ac2efd9 Add test 2022-04-22 11:32:59 +03:00
Dmitry Stogov
c47de38bab Merge spill slots for VAR, VLOAD and VSTORE (this may be unsafe) 2022-04-22 11:30:33 +03:00
Dmitry Stogov
034ef95e07 Allow memory update instructions (without loading into register) 2022-04-22 01:40:10 +03:00
Dmitry Stogov
84b2bac02c Add more tests 2022-04-22 00:11:34 +03:00
Dmitry Stogov
ea77ea27cb Improve code for commutative instructions 
(ir_last_use() may be incomplete)
 2022-04-21 21:47:00 +03:00
Dmitry Stogov
c36efda8a5 Improve register allocation for commutative instructions 
- swap operands f this make sense
- fix coalescing bug
 2022-04-21 16:38:18 +03:00
Dmitry Stogov
bb9813975e Add IR_OP_FLAG_COMMUTATIVE 2022-04-21 11:30:05 +03:00
Dmitry Stogov
139b49c6ea Update tasks 2022-04-21 10:20:41 +03:00
Dmitry Stogov
6f3cc3052c Implement ABS for C code generator 
Remove POW
 2022-04-21 01:00:46 +03:00
Dmitry Stogov
506e7b658f Implement ABS and NEG 2022-04-21 00:31:28 +03:00
Dmitry Stogov
20c9f2e92a Add comment 2022-04-20 19:30:28 +03:00
Dmitry Stogov
a5054f4c31 Add hints for passing arguments 2022-04-20 19:15:03 +03:00
Dmitry Stogov
ffdb53821d Refactor constraint model 
Each instruction consist from 4 sub positions LOAD, USE, DEF, SAVE.
Hardware constraints are modeled conectiong live intervals and fixed
intervals to different sub-positions.
 2022-04-20 18:53:15 +03:00
Dmitry Stogov
9d18dd765b Fix stack frame layout 2022-04-20 14:12:52 +03:00
Dmitry Stogov
9796a7d9a4 Fixed stack frame corruption 2022-04-20 12:27:29 +03:00
Dmitry Stogov
705f0f1e1d VADDR instruction 2022-04-20 12:00:36 +03:00
Dmitry Stogov
81852e6536 Separate tasks 2022-04-20 10:03:00 +03:00
Dmitry Stogov
90e2104fd8 Missing break 2022-04-20 10:02:46 +03:00
Dmitry Stogov
51daf5556c Initial support for ALLOCA, LOAD and STORE (incomplete) 2022-04-19 23:42:05 +03:00
Dmitry Stogov
016a7c14d7 Fixed format 2022-04-19 22:41:51 +03:00
Dmitry Stogov
6b60d8fba9 Code generation for VLOAD and VSTORE 2022-04-19 22:35:29 +03:00
Dmitry Stogov
7e9d1d7dba Improve VLOAD/VSTORE support in C code generator 2022-04-19 17:14:44 +03:00
Dmitry Stogov
e449345514 Fix few CSSP bugs 2022-04-19 16:45:03 +03:00
Dmitry Stogov
a1366ebd92 Use zero-extended load if possible 2022-04-19 14:18:39 +03:00
Dmitry Stogov
207dca73e8 64-bit constants support 2022-04-19 14:11:07 +03:00
Dmitry Stogov
d44dc682f4 Added support for hex numbers 2022-04-19 13:11:12 +03:00
Dmitry Stogov
ac464ffe5e Support for 64-bit constants in switch 2022-04-19 11:55:12 +03:00
Dmitry Stogov
155c9572c8 Add ability to run "ir_test" with different optimization levels 
Fix JIT for "cmp mem, imm"
 2022-04-19 11:03:01 +03:00
Dmitry Stogov
e327fe2737 Cleanup dessa code 2022-04-19 01:55:11 +03:00
Dmitry Stogov
efe9a96bd2 Cleanup dessa code 2022-04-19 01:28:55 +03:00
Dmitry Stogov
6444a1141a Support for 64-bit constants 2022-04-19 01:02:07 +03:00
Dmitry Stogov
0768bfa60c Initial support for 64-bit constants 2022-04-18 23:26:46 +03:00
Dmitry Stogov
ff887eaf49 comment 2022-04-15 16:44:12 +03:00
Dmitry Stogov
af2919ee5c Suppot for TAILCALL 2022-04-15 16:39:07 +03:00
Dmitry Stogov
879c4e75f5 Update vreg hints when compacting 2022-04-15 16:14:42 +03:00
Dmitry Stogov
0922b7cd7f Add vreg hints 2022-04-15 16:02:23 +03:00
Dmitry Stogov
f04433999f Reload loading to avoid register clobbering 2022-04-15 15:22:17 +03:00
Dmitry Stogov
9f24f34aca Cleanup 2022-04-15 14:46:03 +03:00
Dmitry Stogov
3cb707522f Allocate scratch (caller-saved) registers first 2022-04-15 14:22:35 +03:00