Dmitry Stogov
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da11454058
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Fix incorrect code for IJMP
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2022-09-26 14:45:12 +03:00 |
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Dmitry Stogov
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2b4a7d2cb3
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Fix out of bounds array access
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2022-09-23 12:36:11 +03:00 |
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Dmitry Stogov
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8f5768628a
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Initial support for tracing JIT
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2022-09-23 12:22:59 +03:00 |
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Dmitry Stogov
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05fd1f971d
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Better LOAD fusion
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2022-09-21 23:54:45 +03:00 |
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Dmitry Stogov
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12c183f391
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Added support for GUARD_OVERFLOW
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2022-09-20 17:38:27 +03:00 |
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Dmitry Stogov
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c186fb2c25
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Fix constant address loading
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2022-09-20 14:37:10 +03:00 |
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Dmitry Stogov
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63f21925b3
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Avoid useless move
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2022-09-20 00:26:56 +03:00 |
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Dmitry Stogov
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eacb9c1528
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Avoid useless mov
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2022-09-20 00:12:06 +03:00 |
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Dmitry Stogov
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b519f80da5
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More accurte fusion of address calculation
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2022-09-16 12:05:36 +03:00 |
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Dmitry Stogov
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86bec14bc2
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Fixed fuse loading in BITCAST
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2022-09-16 10:19:31 +03:00 |
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Dmitry Stogov
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4a8ebd5be5
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Fuse function address load into CALL/TAILCALL without arguments
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2022-09-16 09:54:49 +03:00 |
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Dmitry Stogov
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57a9731179
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Fix spill load code
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2022-09-15 23:24:28 +03:00 |
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Dmitry Stogov
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b549d98aba
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The second operand for MEM_BINOP_INT must be in a register
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2022-09-15 20:29:30 +03:00 |
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Dmitry Stogov
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367e47ac30
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Support for preallocated stack (ZEND_VM_HYBRID_JIT_RED_ZONE_SIZE in PHP VM)
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2022-09-15 15:39:15 +03:00 |
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Dmitry Stogov
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ad59556d85
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Add support for binding IR nodes to "external" spill slots (e.g. PHP VM stack slots)
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2022-09-15 15:26:43 +03:00 |
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Dmitry Stogov
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5f4b42155f
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ctx->rules[] is valid only for non CONST IR reference
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2022-09-14 15:54:24 +03:00 |
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Dmitry Stogov
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05bc456c6a
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Move base regester selection code into ir_ref_spill_slot()
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2022-09-07 23:47:30 +03:00 |
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Dmitry Stogov
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2677299bbd
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Fix invalid type
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2022-09-07 22:21:12 +03:00 |
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Dmitry Stogov
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b68c4db601
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Don't fuse LOAD into instruction in diffrent basic block
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2022-09-06 14:01:35 +03:00 |
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Dmitry Stogov
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8600801c1f
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Eliminate identical comparisons
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2022-09-05 14:41:38 +03:00 |
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Dmitry Stogov
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fb0d5fd87c
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Improve GUARD instructions support
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2022-09-02 13:54:31 +03:00 |
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Dmitry Stogov
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c865599451
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Fix code generation
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2022-09-02 13:12:58 +03:00 |
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Dmitry Stogov
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5034f8dedb
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Allow genearion of TEST MEM, IMM
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2022-09-01 22:25:29 +03:00 |
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Dmitry Stogov
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9b558e544f
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Allow fusion of single address calculation instruction into several load/store instructions
Previously, if calculated address were used in few places we kept it in a register (without
fusion).
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2022-09-01 20:40:29 +03:00 |
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Dmitry Stogov
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756a1afc82
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Better register allocation support for address and load fusion
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2022-09-01 19:19:01 +03:00 |
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Dmitry Stogov
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5e4503b624
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Fix JMP optimization for MERGE/N and last basic block
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2022-08-31 00:01:15 +03:00 |
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Dmitry Stogov
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32198c00b7
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Reimplement JMP optimization
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2022-08-30 23:15:20 +03:00 |
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Dmitry Stogov
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5afa116d34
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Get rid of MREF macros
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2022-08-30 16:15:30 +03:00 |
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Dmitry Stogov
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80192093e5
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Swap operands of FP comparison to produce the better code
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2022-08-30 15:52:55 +03:00 |
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Dmitry Stogov
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e4be1de649
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Allow LOAD/STORE fusion for ADD_OV/SUB_OV
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2022-08-30 12:23:20 +03:00 |
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Dmitry Stogov
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0596de2291
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Fuse LOAD into IMULL/3
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2022-08-30 11:26:38 +03:00 |
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Dmitry Stogov
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e87e71b092
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cleanup
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2022-08-30 10:23:56 +03:00 |
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Dmitry Stogov
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11c03dbfb3
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Fix call stack alignment and fastcall support
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2022-08-30 00:42:06 +03:00 |
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Dmitry Stogov
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fd8539e17d
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Eliminate TEST after ADD/SUB/AND/OR/XOR
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2022-08-29 22:22:30 +03:00 |
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Dmitry Stogov
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c69d970ca2
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Add missing "else"
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2022-08-26 11:50:28 +03:00 |
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Dmitry Stogov
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e023a18749
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Test part of the register to avoid test with mask
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2022-08-26 11:48:13 +03:00 |
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Dmitry Stogov
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57f9e6ed8f
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Optimize AND into TEST
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2022-08-26 11:07:35 +03:00 |
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Dmitry Stogov
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23d7b3b4ac
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Simplift integer comarison code genertor
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2022-08-25 23:42:15 +03:00 |
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Dmitry Stogov
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1d4b00ddb0
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Load fusion for BITCAST
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2022-08-25 23:18:00 +03:00 |
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Dmitry Stogov
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f8cf71318e
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Load fusion into type conversion instructions
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2022-08-25 23:06:45 +03:00 |
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Dmitry Stogov
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56956cbe0f
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Load fusion for IF_INT
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2022-08-25 22:18:15 +03:00 |
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Dmitry Stogov
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1f657fd4d7
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Load fusion for MUL/DIV/MOD
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2022-08-25 21:47:07 +03:00 |
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Dmitry Stogov
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dbb382224d
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Remove useless code
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2022-08-25 21:14:56 +03:00 |
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Dmitry Stogov
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47083e0f9f
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Improve LOAD fusion
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2022-08-25 18:16:17 +03:00 |
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Dmitry Stogov
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aa28e865da
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Fuse load into binary ops
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2022-08-24 23:26:08 +03:00 |
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Dmitry Stogov
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65e1619de8
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Fuse address calculation into LOAD/STORE
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2022-08-24 16:11:04 +03:00 |
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Dmitry Stogov
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7513098293
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Don't generate code for dead loads
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2022-08-23 12:35:10 +03:00 |
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Dmitry Stogov
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b0cba142a9
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Merge ir_uses_fixed_reg() into ir_get_def_flags() and ir_get_use_flags()
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2022-08-12 21:17:19 +03:00 |
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Dmitry Stogov
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ca109d3fc9
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Use single live interval to handle all scratch registers clobbered by CALL
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2022-08-11 19:56:59 +03:00 |
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Dmitry Stogov
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36a5bdaf43
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Improve support for fixed prologue/epilogue
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2022-08-11 13:32:44 +03:00 |
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