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ir/tests/x86
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Dmitry Stogov 7058c41411 More accurate spill loads optimization for instructions that reuse op1 register for result 
This also fixes possbile incorrect register-allocation/code-generation
for SHIFT instuction on x86[_64]
2023-06-29 12:42:44 +03:00
..
abs_001.irt
Better usage of the register hints
2023-06-09 16:26:15 +03:00
abs_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
abs_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_001.irt
Avoid loading of stack parameter to register if this is not necessary
2023-06-09 00:35:15 +03:00
add_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_003.irt
Avoid loading of stack parameter to register if this is not necessary
2023-06-09 00:35:15 +03:00
add_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_006.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_007.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_008.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_009.irt
Extend test suite to support XFAIL section
2022-11-22 10:43:29 +03:00
add_010.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_011.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_012.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_ov_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_ov_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_ov_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
add_ov_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
alloca_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
alloca_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
bswap_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
conv_001.irt
Extend test suite to support XFAIL section
2022-11-22 10:43:29 +03:00
conv_002.irt
Extend test suite to support XFAIL section
2022-11-22 10:43:29 +03:00
conv_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
conv_004.irt
Extend test suite to support XFAIL section
2022-11-22 10:43:29 +03:00
conv_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
conv_006.irt
Clear destination regeister before INT to FP conversion to avoid partial register stall
2022-12-28 00:05:23 +03:00
conv_007.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
conv_008.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
conv_009.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
conv_010.irt
Extend test suite to support XFAIL section
2022-11-22 10:43:29 +03:00
conv_011.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
div_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
div_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
div_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
div_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
div_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
div_006.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
eq_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
eq_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
eq_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
eq_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
eq_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ge_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ge_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ge_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ge_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ge_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
gt_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
gt_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
gt_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
gt_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
gt_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
if_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
jcc_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
le_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
le_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
le_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
le_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
le_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
lt_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
lt_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
lt_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
lt_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
lt_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
min_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
min_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
min_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
min_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
min_005.irt
Better usage of the register hints
2023-06-09 16:26:15 +03:00
min_006.irt
Better usage of the register hints
2023-06-09 16:26:15 +03:00
min_007.irt
Fix incorrect conditions
2022-12-01 00:43:42 +03:00
mod_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mod_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mod_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mod_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mod_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mul_001.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
mul_002.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
mul_003.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
mul_004.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
mul_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mul_006.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mul_007.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mul_ov_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
mul_ov_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ne_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ne_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ne_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ne_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ne_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
neg_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
neg_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
neg_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
not_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
not_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_001.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
ra_002.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
ra_003.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
ra_004.irt
Use IMUL instead of MUL
2022-12-16 12:57:40 +03:00
ra_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_006.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_007.irt
Avoid loading of stack parameter to register if this is not necessary
2023-06-09 00:35:15 +03:00
ra_008.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_009.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_010.irt
Avoid loading of stack parameter to register if this is not necessary
2023-06-09 00:35:15 +03:00
ra_011.irt
Avoid loading of stack parameter to register if this is not necessary
2023-06-09 00:35:15 +03:00
ra_012.irt
Avoid loading of stack parameter to register if this is not necessary
2023-06-09 00:35:15 +03:00
ra_013.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_014.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ra_015.irt
More accurate spill loads optimization for instructions that reuse op1 register for result
2023-06-29 12:42:44 +03:00
setcc_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
shl_001.irt
More accurate spill loads optimization for instructions that reuse op1 register for result
2023-06-29 12:42:44 +03:00
shl_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
shl_003.irt
More accurate spill loads optimization for instructions that reuse op1 register for result
2023-06-29 12:42:44 +03:00
shl_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_004.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_005.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_006.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_007.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_008.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_009.irt
Extend test suite to support XFAIL section
2022-11-22 10:43:29 +03:00
sub_010.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_011.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
sub_012.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
test_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
test_003.irt
Fix fusion of IF(_, CMP(AND(_, _) 0))
2023-03-28 19:03:06 +03:00
test_004.irt
Fix fusion of IF(_, CMP(AND(_, _) 0))
2023-03-28 19:03:06 +03:00
uge_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
uge_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
uge_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ugt_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ugt_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ugt_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ule_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ule_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ule_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ult_001.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ult_002.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00
ult_003.irt
Add more tests (8 tests ara failed on 32-bit x86)
2022-11-08 11:56:22 +03:00