Dmitry Stogov
180e9dd626
Fix scheduling for VADDR
2023-10-12 10:17:51 +03:00
Javier Eguiluz
2f4f8504d4
Fix some typos ( #51 )
2023-10-03 08:34:02 +03:00
Dmitry Stogov
e60bb978f4
Use _xlat[] slots for "used constants" markers
2023-07-07 13:57:01 +03:00
Dmitry Stogov
4bb03ab7e3
ws
2023-07-07 11:53:11 +03:00
Dmitry Stogov
5b90420b18
Improved unused constant elimination
2023-07-07 11:15:52 +03:00
Dmitry Stogov
496a98708e
Improved IR linearization
2023-07-07 02:11:03 +03:00
Dmitry Stogov
ef201cd349
Use xlat[] directly (instead of "scheduled" bitset).
2023-07-06 19:34:20 +03:00
Dmitry Stogov
78c377ed2d
Store negarive block number in schedule_early() and postive in
...
schedule_late(). This eliminates a need for "visited" bitset.
2023-07-06 19:30:56 +03:00
Dmitry Stogov
d41abefd58
Move processing of the last node of the block out of the loop
2023-07-06 14:10:50 +03:00
Dmitry Stogov
59dbef0cfb
typo
2023-07-06 12:59:33 +03:00
Dmitry Stogov
f6cf9140da
Update ir_insn.inputs_count and use it after ir_build_def_use_lists()
2023-07-06 01:15:08 +03:00
Dmitry Stogov
8c331e3264
typo
2023-07-04 18:22:15 +03:00
Dmitry Stogov
da9c406cf5
Always build ir_ctx.cfg_map during scheduling (it's used for spill code placement)
2023-07-04 16:37:21 +03:00
Dmitry Stogov
b37d4e0443
Allow usage of CPU stack slots for deoptimization
2023-06-16 02:14:02 +03:00
Dmitry Stogov
e506c1367d
Allow motion of loop invariant bound nodes
...
Spilling of bound nodes may introduce anti-dependencies, but the
previous restriction doesn't fix the possible problems
2023-06-08 00:32:36 +03:00
Dmitry Stogov
70da8bef54
Avoid check for PHI, PI, PARAM and VAR nodes in BB started by a node with a single use-def edge (control edge)
2023-06-07 10:27:41 +03:00
Dmitry Stogov
3f009c2d5a
Disable scheduling of related ADD_OV/SUB_OV/MUL_OV and OVERFLOW into different blocks
2023-06-06 23:55:40 +03:00
Dmitry Stogov
4e01e7251e
Implemented support for veneers on AArch64
2023-06-02 00:49:32 +03:00
Dmitry Stogov
38ee633419
Don't move conditions of IF and GUARDs out of loops
2023-05-30 15:10:23 +03:00
Dmitry Stogov
c9d3804b6e
Fixed mistakes in GCM algorithm
2023-05-29 17:02:50 +03:00
Dmitry Stogov
c3fca224ff
Introduce IR_OP_FLAG_PINNED and IR_BB_HAS_PHI/PI/PARAM/VAR flags
2023-05-05 16:59:22 +03:00
Dmitry Stogov
76f44fa126
Implemented path-exploration based live ranges construction
...
The algorithm is based on "Computing Liveness Sets for SSA-Form Programs",
Florian Brandner, Benoit Boissinot, Alain Darte, Benoit Dupont de Dinechin,
Fabrice Rastello. TR Inria RR-7503, 2011
In comparison to the existing bitset based approach, the new algorithm
is more memory-space efficient and faster on big functions.
2023-05-05 02:01:53 +03:00
Dmitry Stogov
c2470bc684
Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point (support for nested loops)
2023-04-25 21:54:30 +03:00
Dmitry Stogov
1749168078
Add ir_insn_len() and ir_insn_inputs_to_len() private helpers
2023-04-21 13:40:55 +03:00
Dmitry Stogov
e01c43a967
Simplify access to nodes with variable inputs count
2023-04-21 12:40:17 +03:00
Dmitry Stogov
56b0dbccde
Use ir_ctx.mflags for CPU specific code-generation options
...
'mflags' and ir_cpuinfo() return value have the same meaning.
2023-04-18 09:54:35 +03:00
Dmitry Stogov
d71cbd47d5
Disable LICM across an OSR ENTRY if the value can't be restored at OSR ENTRY point
2023-04-07 16:36:27 +03:00
Anatol Belski
d0b4f108ee
ir_init: Accept flags as an additional arguments
...
Signed-off-by: Anatol Belski <ab@php.net>
2023-03-28 00:00:45 +02:00
Dmitry Stogov
83edc3f8a1
Disable LICM for overflow checking math
2023-03-22 12:07:05 +03:00
Dmitry Stogov
b1f2167ea5
Calculate number of ENTRY blocks during CFG construction to avoid an eaxtra loop for ctx->entries[] gathering at ir_match()
2023-03-22 10:21:56 +03:00
Dmitry Stogov
ba56eb5497
Fix typo
2023-03-21 17:07:21 +03:00
Dmitry Stogov
9b34731d16
Fix most MSVC compilation warnings
2023-02-28 02:11:09 +03:00
Anatol Belski
964f5a0191
build: MSVC compatibility
...
Signed-off-by: Anatol Belski <ab@php.net>
2023-02-25 00:04:57 +01:00
Dmitry Stogov
c71076d3f0
Allow reservation stack for passing arguments
2023-02-17 15:52:26 +03:00
Dmitry Stogov
28a5714a8e
Use ANSI symbols
2023-02-17 09:11:38 +03:00
Dmitry Stogov
d07a2db592
Improve GCM to schedule floating nodes that depends only on constants
...
(e.g. COPY(CONST)) to the last common ancestor.
Previously these nodes went to the first block.
2023-02-15 15:18:42 +03:00
Dmitry Stogov
29da69cf25
Fix CASE_VAL scheduling (mark op2 as used constant).
2023-01-18 09:38:18 +03:00
Dmitry Stogov
6a4e239773
Create a sparate pass to remove unreachableble CFG blocks.
...
SCCP pass removes unreachable blocks before CFG construction.
In case of -O0 or -O1 pipeline (without SCCP) it's simpler and faster
to unlink unreachable CFG blocks once, then check for reachability
in almost any compilation pass.
-O2 pipeline (with SCCP) don't need this pass.
2022-11-29 20:02:07 +03:00
Dmitry Stogov
3f40e70ac9
Don't delay moving up
2022-11-24 17:05:56 +03:00
Dmitry Stogov
a137adfdf9
Separate ir_build_prev_refs(). It's necessary only for -O0 pipeline.
2022-11-24 12:55:16 +03:00
Dmitry Stogov
7fd1ccf48b
Eliminte useless checks
2022-11-24 12:23:05 +03:00
Dmitry Stogov
6f8012756e
Reuse ir_ctx.prev_ref if the schedule wasn't changed
2022-11-23 16:30:29 +03:00
Dmitry Stogov
b94f907907
Create ir_ctx.orev_ref[] array in ir_schedule()
2022-11-23 16:15:05 +03:00
Dmitry Stogov
c5220fdf8d
evisit and improve ir_schedule()
2022-11-23 10:22:37 +03:00
Dmitry Stogov
93172a487d
Add special case for functions with single Basic Block
2022-11-11 17:43:44 +03:00
Dmitry Stogov
406b08030d
Revisit and optimize GCM implementation
...
Use two different queues to schedule early and late
2022-11-11 16:17:56 +03:00
Dmitry Stogov
27fe71c344
Improve CFG builder and reuse ctx->cfg_map for GCM
2022-11-10 22:45:12 +03:00
Dmitry Stogov
3535fd2fc4
Fix compilation warnings and signed/unsigned mess
2022-11-08 23:09:35 +03:00
Dmitry Stogov
cc73788981
Fix compilation warnings
2022-11-08 18:17:29 +03:00
Dmitry Stogov
cc56f12f13
Add LICENSE and copyright notices
2022-11-08 11:32:46 +03:00
