ir/TODO

-  va_arg nodes
-  BSTART, BEND nodes (to free data allocated by ALLOCA)

-  VLOAD, VSTORE -> SSA

?  reassociation folding rules
-  folding engine improvement (one rule for few patterns)

-  irreducable loops detection/support

-  range inference and PI node
-  SCCP edge cases
-  Folding after SCCP (see combo4.ir)
-  Extend SCCP to remove dead LOADs

?  instruction selection
	- xor, btsl=INCL, btrl=EXCL, btl=IN, bsr
    - MOVZX to avoid a SHIFT and AND instruction
    - BURS ???

?  register allocation
	-  hints and low priority registers (prevent allocating registers that are used as hints
	   tests/x86/ra_015.irt, tests/x86/combo_004.irt tests/x86/min_005.ir, tests/x86/min_006.irt, tests/x86/abs_001.irt)
	-  spill slot coalescing
	-  optimisation of spill code placement (BB local or through resolution)
	-  separate INT and FP allocation phases (for performance)

?  code generation
	-  COND
	-  TAILCALL with stack arguments (tests/x86/tailcall_001.itr)
	-  32-bit x86 back-end 64-bit integers support
		(add_009.irt, conv_001.irt, conv_002.irt, conv_004.irt, conv_010.irt, sub_009.irt)
	-  binary code emission without DynAsm ???

-  modules (functions, data objecs, import, export, prototypes, forward declarations, memory segments, ref data, expr data) 
-  C front-end
-  interpreter
-  alias analyzes

-  PHP support