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ir/tests/debug
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Dmitry Stogov c9bb858e50 Fuse loads without register allocation when this makes sense. 
Make oarameters passed through stack to reuse the same stack slot for spilling.
2022-05-19 10:53:08 +03:00
..
args_001.irt
Align stack once
2022-05-17 23:01:37 +03:00
args_002.irt
Preallocate call stack
2022-05-17 22:37:13 +03:00
call2.irt
Fix spill loads during argument passing
2022-05-06 12:55:07 +03:00
call3.irt
Fix temporary register usage for parralel arguments passing
2022-05-16 15:34:36 +03:00
call_002.irt
Use different interval for registers clobbered by CALL
2022-05-13 15:53:54 +03:00
call_alloca.irt
Fix ALLOCA to align stack frame
2022-04-22 12:55:38 +03:00
call_vaddr.irt
Add more tests
2022-04-22 00:11:34 +03:00
call-O0.irt
Fix spill loads during argument passing
2022-05-06 12:55:07 +03:00
call.irt
Fix spill loads during argument passing
2022-05-06 12:55:07 +03:00
combo_001.irt
Add more tests
2022-04-22 00:11:34 +03:00
combo_002.irt
Add more tests
2022-04-22 00:11:34 +03:00
combo_003.irt
Add more tests
2022-04-22 00:11:34 +03:00
combo_004.irt
Add more tests
2022-04-22 00:11:34 +03:00
dce_001.irt
Add more tests
2022-04-22 00:11:34 +03:00
dessa_001.irt
Add more tests
2022-04-22 00:11:34 +03:00
dessa_002.irt
Add more tests
2022-04-22 00:11:34 +03:00
dessa_003.irt
Better temporary register usage for SSA deconstruction
2022-05-13 00:32:37 +03:00
fig-O0.irt
Fuse loads without register allocation when this makes sense.
2022-05-19 10:53:08 +03:00
fig.irt
Fix stack parameters loading
2022-05-17 15:00:58 +03:00
lea_001.irt
Add more tests
2022-04-22 00:11:34 +03:00
loop_001.irt
Add more tests
2022-04-22 00:11:34 +03:00
loop_002.irt
Add more tests
2022-04-22 00:11:34 +03:00
memop_001.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
memop_002.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
memop_003.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
memop_004.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
memop_005.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
memop_006.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
memop_007.irt
Add support for instructions that modify result directly in memory
2022-05-18 21:49:08 +03:00
params_001.irt
Fuse loads without register allocation when this makes sense.
2022-05-19 10:53:08 +03:00
params_002.irt
Fuse loads without register allocation when this makes sense.
2022-05-19 10:53:08 +03:00
sccp_001.irt
Add more tests
2022-04-22 00:11:34 +03:00
sccp_002.irt
Add SWITCH support for temporary registers
2022-05-06 10:00:19 +03:00
swap.irt
Allow memory update instructions (without loading into register)
2022-04-22 01:40:10 +03:00
switch_001.irt
Add SWITCH support for temporary registers
2022-05-06 10:00:19 +03:00
switch_002.irt
Add more tests
2022-04-22 00:11:34 +03:00
switch_003.irt
Add more tests
2022-04-22 00:11:34 +03:00
tailcall_001.irt
Fix spill loads during argument passing
2022-05-06 12:55:07 +03:00
tailcall_002.irt
Use different interval for registers clobbered by CALL
2022-05-13 15:53:54 +03:00
test64.irt
Add flexible support for temporary registers.
2022-05-05 22:35:39 +03:00
test_mem.irt
Fuse loads without register allocation when this makes sense.
2022-05-19 10:53:08 +03:00
test_var-O0.irt
Merge spills for VSTORE with -O0
2022-05-18 23:12:20 +03:00
test_var.irt
Fuse loads without register allocation when this makes sense.
2022-05-19 10:53:08 +03:00
test-mavx.irt
Add more tests
2022-04-22 00:11:34 +03:00
test-O0.irt
Take into account spill slot size and alignment
2022-05-16 22:16:29 +03:00
test.irt
Add more tests
2022-04-22 00:11:34 +03:00